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Logic Synthesis and Optimization

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods

A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits

Energy Efficient Microprocessor Design

Verilog - 2001

High - Level Synthesis

Interconnects in VLSI Design

Optimal VLSI Architectural Synthesis

Principles of Verilog PLI

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

The SECD Microprocessor

Logic Synthesis for Low Power VLSI Designs

Synchronous Equivalence

Logic Synthesis for Control Automata

High Speed CMOS Design Styles

Reuse Techniques for VLSI Design

Code Generation for Embedded Processors

Formal Semantics and Proof Techniques for Optimizing VHDL Models

Algorithms for Synthesis and Testing of Asynchronous Circuits

A Practical Guide to Analog Behavioral Modeling for IC System Design