SOS ebook Collection contains 5 of our best-selling titles, providing the ultimate reference for every SoC engineer and embedded software designer's library. Get access to over 4500 pages of reference material, at a fraction of the price of the hard-copy books. This CD contains the complete ebooks of the following 5 Morgan Kaufman titles:De Micheli, Networks on Chips, 9780123705211 Ienne, Customizable Embedded Processors, 9780123695260 Leibson, Designing SOCs with Configured Cores, 9780123724984 Jantsch, Modeling Embedded Systems and SOCs, 9781558609259 Jerraya, Multiprocessor Systems-on-Chips, 9780123852519
Sprache
Verlagsort
Verlagsgruppe
Elsevier Science & Technology
Zielgruppe
Für Beruf und Forschung
System-on-Chip engineers designing embedded systems; Engineers in industry working in embedded software, system architectures, processor architectures and design tools
Maße
Höhe: 235 mm
Breite: 191 mm
Gewicht
ISBN-13
978-0-12-374645-0 (9780123746450)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Klassifikation
Axel Jantsch received a Dipl.Ing. in 1988 and a Dr. Tech. degree in 1992 from the Technical University of Vienna. Between 1993 and 1995 he received the Alfred Schroedinger scholarship from the Austrian Science Foundation as a guest researcher at the Royal Institute of Technology (KTH) in Stockholm. From 1995 through 1997 he was with Siemens Austria in Vienna as a system validation engineer. From 1997 to 2002 he was as Associate Professor at KTH, and since December 2002 he has served as Professor in Electronic System Design. Jantsch has published in the areas of VLSI design and synthesis, system level specification, modeling and validation, HW/SW codesign and cosynthesis, reconfigurable computing, processor design and networks-on-chip. For several years he has been a program committee member of FDL and DATE conferences. He has served as TPC chair of SSDL/FDL 2000 and is Subject Area Editor for the Journal of Systems Architecture. At KTH, Jantsch is heading a number of research projects in the areas of system level specification, design, synthesis, validation and network-on-chip architecture. From 1999 to 2002, he served as program manager of the Swedish research program Integrated Electronic Systems with a 4-year budget of 12 million Euro.
Autor*in
Ecole Polytechnique Federale de Lausanne, Switzerland
Professor, Processor Architecture Laboratory, Swiss Federal Institute of Technology of Lausanne, Switzerland
Technology Evangelist, Tensilica, Inc, Santa Clara, CA, USA
Royal Institute of Technology, Stockholm, Sweden
TIMA Laboratory, Grenoble, France