Reversible Computation

Name: Reversible Computation | Third International Workshop, Gent, Belgium, July 4-5, 2011, Revised Papers
Brand: Springer
Price: 53.49 EUR
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Third International Workshop, Gent, Belgium, July 4-5, 2011, Revised Papers

Alexis De Vos Robert Wille(Herausgeber*in)

Springer (Verlag)

Erschienen am 13. April 2012

IX, 123 Seiten

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Inhalt

Title Page
Preface
Table of Contents
Time Complexity of Tape Reduction for Reversible Turing Machines
Introduction
Reversible Turing Machines
One-Tape Simulation of Multitape RTMs
Eliminating Stuck States from RTMs
Two-Tape Simulation of Multitape RTMs
The Hennie-Stearns Simulation
Reversible Cleanup Implementation
Reversible Time Complexity
Related Work
Conclusion
References
Removing the Trace
Towards a Reversible Functional Language
Introduction
The Language
Syntax
Reversibility and Most General Matcher
Semantics
Reversibility and Semantics
Examples
r-Turing Completeness
Conclusion
References
A Reversible Processor Architecture and Its Reversible Logic Design
Introduction
The Problem of Control
A Simple Instruction Set Architecture, BobISA
Arithmetic-Logic Instructions
Branch Instructions
Memory Instruction
The Architecture of the Reversible Machine, Bob
Reversible Arithmetic-Logic Unit, ALU
Address Calculation
Verification
Conclusion
References
Optimization of Reversible Circuits Using Reconfigured Templates
Introduction
Background
Quantum Templates
Template Matching Algorithm
Experimental Results
Conclusion
References
Hybrid GF(2) - Boolean Expressions for Quantum Computing Circuits
Introduction
Hybrid GF(2) - Boolean Expressions
Higher Number of Mixed Control Signals
References
RevKit: An Open Source Toolkit for the Design of Reversible Circuits
Introduction
The RevKit Framework
The Users' Perspective: Applying RevKit
Using the Python Interface
Using the Graphical User Interface
The Developers' Perspective: Extending RevKit
Architecture and Design Concepts
Adding a New Approach to RevKit
Conclusions
References
Transforming MCT Circuits to NCVW Circuits
Introduction
Background
NCVW Circuits for MCT Gates
NCVW Circuits for MCT Circuits
Experimental Results
Conclusions and Future Work
References
Changing the Gate Order for Optimal LNN Conversion
Introduction
Preliminaries
Quantum Circuit
LNN Architecture
Changing the Gate Order for Optimal LNN Conversion
Problem Definition
Dependence between Quantum Gates
Gate Dependence Graph
Adjacent Transposition Graph
Overview and an Example of the Proposed Method
The Breadth First Search by Utilizing the Adjacent Transposition Graph
Experimental Results
Conclusions
References
Towards the Limits of Cascaded Reversible (Quantum-Inspired) Circuits
Introduction
Setting the Criteria for the Validity of a Signal
Setting the Limits for Amplitudes
Setting the Limits for Delays
Criteria for the Validity of a Signal
The Limit Number of Cascaded Gates
Discussion on the Positive Impact of a Lower VT
Conclusion
References
Interfacing Reversible Pass-Transistor CMOS Chips with Conventional Restoring CMOS Circuits
Introduction
FPGA Capabilities and Limitations
Signal Generation
Interfacing and Timing with Internal Clock and Memory
I/O Programming
The Interface Board
Bringing the FPGA Commands to the Reversible Inputs
Bringing the Results of the Calculation to the FPGA
The Problem of Reversibility
Clocking the Signals
Conclusion
References
Author Index

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