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"The development of the SystemVerilog language makes it easier to produce more efficient and concise descriptions of complex hardware designs. The authors of this book have been involved with the development of the language from the beginning, and who is better to learn from than those involved from day one?"
(Greg Spirakis, Vice President of Design Technology, Intel Corporation)
"As a company committed to `open standards', and as one of the early adopters of Verilog, Sun has been a driving force in the standardization effort for SystemVerilog from its inception. SystemVerilog can significantly improve the productivity of designers in the coming years, and this book is a comprehensive reference text for engineers who want to learn about SystemVerilog for their next generation designs."
(Sunil Joshi, Vice President of Software Technologies and Computer Resources, Sun Microsystems, Inc.)
"SystemVerilog directly addresses the need for efficient and powerful modeling essential to support the complexity, size, and scale of next generation hardware designs. This book explains how to use SystemVerilog effectively and provides numerous examples to illustrate how each of the language constructs can best be utilized."
(Chris Malachowsky, Co-Founder and Vice President of Hardware, NVIDIA Corporation)
Sprache
Verlagsort
Verlagsgruppe
Illustrationen
4
4 s/w Abbildungen
XXVIII, 374 p. 4 illus.
Dateigröße
ISBN-13
978-1-4757-6682-0 (9781475766820)
DOI
10.1007/978-1-4757-6682-0
Schweitzer Klassifikation
1: Introduction to SystemVerilog.- 2: SystemVerilog Literal Values and Built-in Data Types.- 3: SystemVerilog User-Defined and Enumerated Data Types.- 4: SystemVerilog Arrays, Structures and Unions.- 5: SystemVerilog Procedural Blocks, Tasks and Functions.- 6: SystemVerilog Procedural Statements.- 7: Modeling Finite State Machines with SystemVerilog.- 8: SystemVerilog Design Hierarchy.- 9: SystemVerilog Interfaces.- 10: A Complete Design Modeled with SystemVerilog.- 11: Behavioral and Transaction Level Modeling.- Appendix A: The SystemVerilog Formal Definition (BNF).- Appendix B: A History of SUPERLOG, The Beginning of SystemVerilog.
