A Guide to RISC Microprocessors

PrefacePart I. Perspective 1. RISC Architectures 2. Instruction Set Design 3. Design Issues for Next-Generation ProcessorsPart II. SPARC 4. SPARC Architecture 5. Cypress SPARC Chips 6. SPARC Support 7. Redesigned Cypress SPARC Chip Set 8. First ECL Microprocessor 9. LSI Logic Embedded Control SPARC Processor 10. Fujitsu Embedded SPARC ProcessorPart III. MIPS 11. MIPS Processor 12. MIPS R3000 System Design 13. IDT R3000 Derivative 14. MIPS Chip Set with Full ECL CPU Implementation 15. ECL Bus Controller 16. IDT Embedded MIPS Processors 17. High Integration on MIPS-Based Processor 18. MIPS with 64-Bit R4000 ArchitecturePart IV. Motorola 88000 19. Motorola 88000 RISC Chip Set 20. Motorola 88200Part V. Intel 860 21. Intel i860 Performance 22. Intel i860 Graphics Unit Evaluation 23. Intel i860 Parallel Processing Support 24. MASS860Part VI. Intel 960 25. Intel Register Scoreboarding 26. Intel 960 Architecture 27. Intel 80960 Features 28. Intel 80960CA Superscalar Microprocessor 29. Conflict Avoidance 30. Intel 960SA and 960SBPart VII. AMD 29000 31. AMD 29000 Architecture 32. AMD 29000 Bus Structure 33. AMD 29050 34. PA-RISC 35. PA WorkstationsIndex