Power Distribution Networks with On-Chip Decoupling Capacitors
is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding tens of watts and the power supply below a volt. The book provides insight and intuition into the behavior and design of integrated circuit-based power distribution systems.
The book has three primary objectives. The first is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the power terminals of the on-chip circuitry. The second is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for effciently placing on-chip decoupling capacitors in nanoscale integrated circuits.
Power Distribution Networks with On-Chip Decoupling Capacitors
is a reference for professional engineers in the fields of circuits and systems and computer-aided design.
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ISBN-13
978-0-387-71601-5 (9780387716015)
DOI
10.1007/978-0-387-71601-5
Schweitzer Klassifikation
Inductive Properties of Electric Circuits.- Properties of On-Chip Inductive Current Loops.- Electromigration.- High Performance Power Distribution Systems.- Decoupling Capacitance.- On-Chip Power Distribution Networks.- Computer-Aided Design and Analysis.- Inductive Properties of On-Chip Power Distribution Grids.- Variation of Grid Inductance with Frequency.- Inductance/Area/Resistance Tradeoffs.- Scaling Trends of On-Chip Power Distribution Noise.- Impedance Characteristics of Multi-Layer Grids.- Multiple On-Chip Power Supply Systems.- On-Chip Power Distribution Grids with Multiple Supply Voltages.- Decoupling Capacitors for Multi-Voltage Power Distribution Systems.- On-chip Power Noise Reduction Techniques in High Performance ICs.- Effective Radii of On-Chip Decoupling Capacitors.- Efficient Placement of Distributed On-Chip Decoupling Capacitors.- Impedance/Noise Issues in On-Chip Power Distribution Networks.- Conclusions.
