This book will describe ultra low-power, integrated circuits and systems designed for the emerging field of neural signal recording and processing, and wireless communication. Since neural interfaces are typically implanted, their operation is highly energy-constrained. This book introduces concepts and theory that allow circuit operation approaching the fundamental limits. Design examples and measurements of real systems are provided. The book will describe circuit designs for all of the critical components of a neural recording system, including:
Amplifiers which utilize new techniques to improve the trade-off between good noise performance and low power consumption.
Analog and mixed-signal circuits which implement signal processing tasks specific to the neural recording application:
Detection of neural spikes Extraction of features that describe the spikes
Clustering, a machine learning technique for sorting spikes Weak-inversion operation of analog-domain transistors, allowing processing circuits that reduce the requirements for analog-digital conversion and allow low system-level power consumption. Highly-integrated, sub-mW wireless transmitter designed for the Medical Implant Communications Service (MICS) and ISM bands.
Sprache
Verlagsort
Verlagsgruppe
Illustrationen
Dateigröße
ISBN-13
978-1-4419-6727-5 (9781441967275)
DOI
10.1007/978-1-4419-6727-5
Schweitzer Klassifikation
1 - Contents [Seite 5]
2 - Introduction [Seite 8]
3 - Bio-Signal Interface Amplifiers: An Introduction [Seite 15]
3.1 - Characteristics of the Recording Electrodes [Seite 15]
3.2 - Characteristics of Bio-Signals [Seite 17]
3.2.1 - Brain Recordings [Seite 17]
3.2.2 - Muscle-Based Signals [Seite 18]
3.3 - Noise/Power Tradeoff [Seite 18]
3.3.1 - Flicker Noise, 1/f Noise [Seite 18]
3.3.2 - Thermal Noise [Seite 19]
3.4 - Representative Prior Art [Seite 19]
4 - A Low-Power, Low-Noise, Open-Loop Amplifier for Neural Recording [Seite 21]
4.1 - Open-Loop Amplifier Design [Seite 21]
4.2 - Results [Seite 23]
4.3 - Effect of Non-Linearity on Neural Recordings [Seite 26]
4.4 - Conclusions [Seite 29]
5 - Closed-Loop Neural Recording Amplifier Design Techniques [Seite 31]
5.1 - Design of a Closed-Loop Telescopic Amplifier [Seite 31]
5.1.1 - Closed-Loop Architecture [Seite 31]
5.1.2 - Analysis of Pseudo-Resistors [Seite 32]
5.1.3 - Telescopic OTA Design Overview [Seite 33]
5.1.4 - Design Optimization [Seite 34]
5.1.5 - Stability and Common-Mode Feedback [Seite 35]
5.2 - Design of a Closed-Loop Complementary-Input Amplifier [Seite 36]
5.2.1 - Design of an Closed-Loop Fully-Differential Complementary-Input Amplifier [Seite 36]
5.3 - Design of a Variable-Gain Amplifier [Seite 39]
6 - Closed-Loop Bio-Signal Amplifiers: Experimental Results [Seite 42]
6.1 - Amplifier Testing [Seite 42]
6.2 - Variable Gain Amplifier (VGA) Testing [Seite 44]
6.3 - In-Vivo Testing [Seite 46]
7 - Design and Implementation of Chopper-Stabilized Amplifiers [Seite 50]
7.1 - Chopper-Stabilization Technique [Seite 50]
7.1.1 - Open-Loop Operation Principle [Seite 50]
7.1.2 - Closed-Loop Operation Principle [Seite 51]
7.2 - Design of a Chopper-Stabilized Amplifier [Seite 51]
7.3 - Hardware Implementation [Seite 53]
7.3.1 - Transfer Function [Seite 53]
7.3.2 - Amplifier Noise [Seite 54]
8 - Spike Detection and Characterization [Seite 55]
8.1 - The Spike Detection Task [Seite 55]
8.2 - Spike Detection Techniques [Seite 57]
8.3 - Analog and Mixed-Mode Computation [Seite 58]
8.4 - System Design [Seite 59]
8.4.1 - Spike Detector [Seite 60]
8.4.2 - Feature Extraction [Seite 61]
8.4.3 - Analog-Digital Converter [Seite 62]
8.5 - Results [Seite 63]
9 - Spike Sorting [Seite 68]
9.1 - Overview [Seite 68]
9.2 - K-Means Clustering Algorithm [Seite 70]
9.3 - Hardware Considerations for Analog On-Line Clustering [Seite 72]
9.3.1 - On-Line Median Learning [Seite 72]
9.3.2 - Non-Ideal Computational Elements [Seite 74]
9.3.3 - Asymmetric Updates [Seite 75]
10 - Analog Clustering Circuit [Seite 78]
10.1 - Floating-Gate Memories [Seite 78]
10.2 - Device Characterization [Seite 79]
10.3 - Circuit Design [Seite 82]
10.3.1 - Clustering Circuit [Seite 82]
10.3.2 - Floating-Gate Memory Cell [Seite 84]
10.3.3 - Decision Circuit [Seite 86]
10.4 - Experimental Results [Seite 88]
10.4.1 - Update Rates [Seite 88]
10.4.2 - Memory Cell Retention [Seite 90]
10.4.3 - Classification [Seite 91]
10.4.4 - Clustering Convergence [Seite 93]
10.5 - Discussion [Seite 96]
11 - NeuralWISP: A Wirelessly Powered Spike Density Recording System [Seite 100]
11.1 - Previous Neural Recording Systems [Seite 100]
11.2 - System Design [Seite 102]
11.2.1 - Analog Signal Path [Seite 103]
11.2.2 - Digital Control [Seite 106]
11.3 - Test Results [Seite 106]
11.4 - Experimental Results [Seite 110]
11.5 - Conclusions [Seite 111]
12 - A 500mW Wireles Neural Streaming System [Seite 114]
12.1 - Analog Front End [Seite 114]
12.2 - Conversion and Control [Seite 115]
12.3 - MICS-band Wireless Transmitter [Seite 116]
12.4 - Results [Seite 116]
13 - Conclusions [Seite 119]
14 - Index [Seite 121]
