Verilog HDL is the standard hardware description language for the design of digital systems and VLSI devices. This volume shows designers how to describe pieces of hardware functionally in Verilog using a top-down design approach, which is illustrated with a number of large design examples. The work is organized to present material in a progressive manner, beginning with an introduction to Verilog HDL and ending with a complete example of the modelling and testing of a large subsystem.
Reihe
Auflage
Sprache
Verlagsort
Verlagsgruppe
Kluwer Academic Publishers Group
Zielgruppe
Für höhere Schule und Studium
Für Beruf und Forschung
Research
Illustrationen
11 s/w Abbildungen
11 Illustrations, black and white; VIII, 217 p. 11 illus.
Maße
Höhe: 244 mm
Breite: 170 mm
Dicke: 13 mm
Gewicht
ISBN-13
978-0-9627488-0-6 (9780962748806)
DOI
10.1007/978-1-4684-7462-6
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