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Provides a comprehensive vulnerability analysis across the integrated circuits design flow
Introduces security metrics to measure quantitatively the vulnerability of a circuit to hardware Trojan insertion
Describes design techniques to prevent hardware Trojan insertion and to facilitate hardware Trojan detection
Presents testing techniques for trustworthiness at each circuit level
Dr. Hassan Salmani received the Ph.D. degree in Electrical Engineering from the University of Connecticut in 2011. He is currently an Assistant Professor with Howard University, Washington DC. His current research projects include hardware security and trust and supply chain security. He has authored over ten journal articles and refereed conference papers and has frequently invited for technical talks by different companies such as Boeing, Cisco, and Mentor Graphics. He has also authored one book and two book chapter. He regularly serves as a Program Committee Member and the Session Chair for various conferences such as the Design Automation Conference, the Hardware-Oriented Security and Trust, the International Conference on Computer Design, VLSI Design, and Test. He is a member of the SAE Internationals G-19A Tampered Subgroup, the ACM, and the ACM SIGDA.
The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack.- Circuit Vulnerabilities to Hardware Trojans at the Register Transfer Level.- Design Techniques for Hardware Trojans Prevention and Detection at the Register Transfer Level.- Circuit Vulnerabilities to Hardware Trojans at the Gate Level.- Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level.- Circuit Vulnerabilities to Hardware Trojan at the Layout Level.- Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level.- Trusted Testing Techniques for Hardware Trojan Detection.- Hardware Trojans in Analog and Mixed-Signal Integrated Circuits.
