A comprehensive guide to the theory and design of hardware-implemented finite state machines, with design examples developed in both VHDL and SystemVerilog languages.Modern, complex digital systems invariably include hardware-implemented finite state machines. The correct design of such parts is crucial for attaining proper system performance. This book offers detailed, comprehensive coverage of the theory and design for any category of hardware-implemented finite state machines. It describes crucial design problems that lead to incorrect or far from optimal implementation and provides examples of finite state machines developed in both VHDL and SystemVerilog (the successor of Verilog) hardware description languages.Important features include: extensive review of design practices for sequential digital circuits; a new division of all state machines into three hardware-based categories, encompassing all possible situations, with numerous practical examples provided in all three categories; the presentation of complete designs, with detailed VHDL and SystemVerilog codes, comments, and simulation results, all tested in FPGA devices; and exercise examples, all of which can be synthesized, simulated, and physically implemented in FPGA boards. Additional material is available on the book's Website. Designing a state machine in hardware is more complex than designing it in software. Although interest in hardware for finite state machines has grown dramatically in recent years, there is no comprehensive treatment of the subject. This book offers the most detailed coverage of finite state machines available. It will be essential for industrial designers of digital systems and for students of electrical engineering and computer science.
Reihe
Sprache
Verlagsort
Verlagsgruppe
Zielgruppe
Für Beruf und Forschung
Für höhere Schule und Studium
US School Grade: College Graduate Student and over
Produkt-Hinweis
Illustrationen
199 s/w Abbildungen
199 b&w illus.; 398 Illustrations
Maße
Höhe: 229 mm
Breite: 178 mm
Dicke: 22 mm
Gewicht
ISBN-13
978-0-262-01966-8 (9780262019668)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Klassifikation
Volnei A. Pedroni is Professor of Electronics Engineering at Brazil's Federal University of Technology. He is the author of Circuit Design and Simulation with VHDL (MIT Press).
Autor*in
UTFPR - Federal Technological University of Parana State