This book comprises the select proceedings of the annual convention of the Computer Society of India. Divided into 10 topical volumes, the proceedings present papers on state-of-the-art research, surveys, and succinct reviews. The volumes cover diverse topics ranging from parallel processing to system buses, and from computer architecture to VLIW (very long instruction word). This book focuses on systems and architecture. It aims at informing the readers about those attributes of a system visible to a programmer. This book also deals with various innovations and improvements in computing technologies to improve the size, capacity and performance of modern-day computing systems. The contents of this book will be useful to professionals and researchers alike.
Reihe
Auflage
Sprache
Verlagsort
Zielgruppe
Illustrationen
153
62 s/w Abbildungen, 153 farbige Abbildungen
XV, 338 p. 215 illus., 153 illus. in color.
Maße
Höhe: 235 mm
Breite: 155 mm
Dicke: 19 mm
Gewicht
ISBN-13
978-981-10-8532-1 (9789811085321)
DOI
10.1007/978-981-10-8533-8
Schweitzer Klassifikation
Prof. Sunil Kumar Muttoo is working as a Professor and Head of the Department of Computer Science, University of Delhi. He completed his M.Sc., M.Phil., Ph.D. at the University of Delhi and his M.Tech. (Computer Science and Data Processing, CSDP) at the Indian Institute of Technology Kharagpur (IIT-KGP). He is involved in research in the field of steganography and digital watermarking. He has published more than sixty papers in international/national journals and conference/workshop proceedings. He has more than 30 years of teaching and research experience.
A Mathematical AI Based Diet Analysis and Transformation Model.- Energy Efficient Measures for Sustainable Development of Data Centers.- Analysis on Multiple Combinations of Series Parallel Connections of Super Capacitors for Maximum Energy Transferring to Load in Minimum Time.- Design and Simulation of OTA Using 45 nm Technology.- Design and Analysis of Microstrip Patch Antenna Using DRAF.- Principal Component Analysis Based Block Diagonalization Precoding Algorithm for MU-MIMO.- Low Power High Performance Multitransform Architecture Using Run Time Reconfigurable Adder for FPGA and ASIC Implementation.- A Review of Dynamic Scheduling Algorithms for Homogeneous and Heterogeneous System.- Effective Information Retrieval Algorithm for Linear Multiprocessor Architecture.- Design of Energy Efficient Random Access Memory Circuit Using Low Voltage CMOS and High Speed Transreceiver Logic-I I/O Standard on 28nm FPGA.- Stub Series Terminal Logic Based Low Power Thermal Aware Vedic Multiplier Design on 40-nm FPGA.- LVCMOS Based Low Power Thermal Aware Energy Efficient Vedic Multiplier Design on Different FPGAs.- Timing Constraints Based High Performance DES Design and Implementation on 28nm FPGA.- Input Output Standard Based Energy Efficient UART Design on 90nm FPGA.- Different Configuration of Low Power Memory Design Using Capacitance Scaling on 28nm Field Programmable Gate Array.- Ardudroid Surveillance Bot.- Development of Cross-Toolchain and Linux Device Driver.- Design and Implementation of a Green Traffic Light Controller on FPGA Using VHDL.- Design of Sub-Optimal Controller for Power System Model.- Designing and Simulation of S-Shaped Dielectric Resonator Antenna with Air Gap.- Trajectory Generation for Driver Assistance System.- Performance Enhancement of MRPSOC for Multimedia Applications.- A New CPU Scheduling Algorithm Using Round Robin and Mean of the Processes.- Synchronization of Two Chaotic Oscillators Through Threshold Coupling.- L3C Model of High Performance Computing Cluster for Scientific Applications.- Design & Development of Digital Energy Meter on FPGA.- Design of a Hypothetical 8-Bit Processor Using Reconfigurable Logic in VHDL.- Aspects Involved in the Modeling of PV System, Comparison of MPPT Schemes and Study for Different Ambient Conditions Using P&O Method.- Self Exploring Approach for Path Planning in Robotic Domain.- Novel Approach for Data Classification Using Neutrosophic Entropy.- SDN Layer 2 Switch Simulation Using Mininet and Open Day Light.- An Architectural Design for Knowledge Asset Management System.
