Preface. Introduction. Hardware design processes. IEEE standard VHDL language. Modelling with VHDL. Objects, data types and operators. Multiple architectures and concurrency. Sequential statements and processes. Sequential modelling and attributes. Conditional assignments, concatenation and case. Arrays, loops and assert statements. Subprograms. Types and arithmetic operations. Type conversions, overloading and resolution functions. Scope, visibility, packages and libraries. TEXTIO, blocks and guard. Structural modelling, generics and generate. Appendices. Index.
