1: Introduction
2. Data Flow Description
3.Behavioral Descriptions
4. Structural Description
5. Switch-Level Description
6. Procedures, Tasks, and Functions
7. Mixed-Type Description
8. Advanced HDL Descriptions
9. Mixed-Language Description
10. Synthesis Basics
Appendix A: Creating a Project in Xilinx using VHDL or Verilog
Appendix B. Summary of HDL Commands