Sustainable Wireless Network-on-Chip Architectures

 
 
Morgan Kaufmann (Verlag)
  • 1. Auflage
  • |
  • erschienen am 25. März 2016
  • |
  • 162 Seiten
 
E-Book | ePUB mit Adobe DRM | Systemvoraussetzungen
E-Book | PDF mit Adobe DRM | Systemvoraussetzungen
978-0-12-803651-8 (ISBN)
 

Sustainable Wireless Network-on-Chip Architectures focuses on developing novel Dynamic Thermal Management (DTM) and Dynamic Voltage and Frequency Scaling (DVFS) algorithms that exploit the advantages inherent in WiNoC architectures. The methodologies proposed-combined with extensive experimental validation-collectively represent efforts to create a sustainable NoC architecture for future many-core chips. Current research trends show a necessary paradigm shift towards green and sustainable computing. As implementing massively parallel energy-efficient CPUs and reducing resource consumption become standard, and their speed and power continuously increase, energy issues become a significant concern.

The need for promoting research in sustainable computing is imperative. As hundreds of cores are integrated in a single chip, designing effective packages for dissipating maximum heat is infeasible. Moreover, technology scaling is pushing the limits of affordable cooling, thereby requiring suitable design techniques to reduce peak temperatures. Addressing thermal concerns at different design stages is critical to the success of future generation systems. DTM and DVFS appear as solutions to avoid high spatial and temporal temperature variations among NoC components, and thereby mitigate local network hotspots.


  • Defines new complex, sustainable network-on-chip architectures to reduce network latency and energy
  • Develops topology-agnostic dynamic thermal management and dynamic voltage and frequency scaling techniques
  • Describes joint strategies for network- and core-level sustainability
  • Discusses novel algorithms that exploit the advantages inherent in Wireless Network-on-Chip architectures


Jacob A. Murray received his PhD in Electrical and Computer Engineering at the School of Electrical Engineering and Computer Science, Washington State University in 2014 and received his BS in Computer Engineering at Washington State University in 2010. He is a Clinical Assistant Professor and Program Coordinator at the School of Electrical Engineering and Computer Science, Washington State University, Everett. His current research interests include sustainable and low-power design for on-chip interconnection networks, routing for wireless on-chip communication networks, and temperature-aware design for topology-agnostic networks. He has been a Harold Frank Entrepreneur and participated as one of five undergraduate finalist teams in the 2010 National Collegiate Inventors Competition. He is a member of Tau Beta Pi, the national engineering honors society, and a member of the IEEE.
  • Englisch
  • San Diego
  • |
  • USA
Elsevier Science
  • 8,17 MB
978-0-12-803651-8 (9780128036518)
0128036516 (0128036516)
weitere Ausgaben werden ermittelt
  • Front Cover
  • Sustainable Wireless Network-on-Chip Architectures
  • Copyright Page
  • Contents
  • 1 Introduction
  • The Network-on-Chip Paradigm
  • Traditional NoC Interconnect Topologies
  • Traditional NoC Routing
  • Traditional NoC Backbone
  • References
  • 2 Current Research Trends and State-of-the-Art NoC Designs
  • The Small-World Topology (and Other Irregular Topologies)
  • Design for Topology-Agnostic Routing for Irregular Networks
  • 3D, Optical, and Wireless Integration for NoC
  • Power- and Temperature-Aware Design Considerations
  • References
  • 3 Complex Network Inspired NoC Architecture
  • Distance Between Cores (lij)
  • Frequency of Interaction Between Cores (fij)
  • Alpha and Beta
  • fij for Various Traffic Patterns
  • Uniform Random Traffic
  • Transpose Traffic
  • Hotspot Traffic
  • Benchmark Suites
  • The Small-World Characteristic
  • References
  • Appendix A.1 Lij matrix for a 16 core NoC with a tile floorplan
  • Appendix A.2 Fij matrix for uniform random traffic
  • Appendix A.3 Fij matrix for transpose traffic
  • Appendix A.4 Fij matrix for hotspot traffic
  • 4 Wireless Small-World NoCs
  • Wireless Physical Layer Design
  • Millimeter-Wave Antennas
  • Carbon Nanotube Antennas
  • Communication and Channelization
  • Millimeter-Wave Communication
  • CNT Communication
  • Topology of Wireless NoCs
  • Topology of CNT and mm-Wave SWNoC
  • Topology of a Hierarchical SWNoC
  • References
  • 5 Topology-Agnostic Routing for Irregular Networks
  • A Simple Approach to Topology-Agnostic Routing
  • Routing Strategy for Hierarchical Wireless Small-World Networks
  • Advanced Routing Strategies for Wireless Small-World Networks
  • Rule-Based MROOTS Routing Strategy
  • Path-Based ALASH Routing Strategy
  • References
  • 6 Performance Evaluation and Design Trade-Offs of Wireless SWNoCs
  • Performance Metrics
  • Optimal Configuration of the SWNoC
  • Optimal Configuration of the mSWNoC
  • Throughput of CSWNoC
  • Throughput and Energy Dissipation for CSWNoC With Wireless Link Failure
  • Performance of CSWNoC in the Presence of Nonuniform Traffic
  • Energy Dissipation for CSWNoC
  • Packet Latency and Energy Dissipation of mSWNoC
  • Network Saturation Performance of mSWNoC
  • Thermal Characteristics of mSWNoC
  • References
  • 7 Dynamic Voltage and Frequency Scaling
  • Processor-Level DVFS
  • Network-Level DVFS
  • Performance Evaluation
  • DVFS Setup
  • Execution Time Penalty
  • Energy Dissipation
  • Thermal Hotspots
  • Temperature Profile
  • References
  • 8 Dynamic Thermal Management
  • Temperature-Aware Task Allocation
  • Temperature-Aware Adaptive Routing
  • Experimental Results
  • Root Node Selection for MROOTS
  • mSWNoC Performance Evaluation
  • Latency and Energy Characteristics
  • Network-Level Thermal Characteristics
  • Temperature-Aware Techniques
  • Temperature-Aware Adaptive Routing Setup
  • DTM Effects on Performance
  • Temperature Analysis of Task Allocation
  • Avoiding Local Hotspots
  • References
  • 9 Joint DTM and DVFS Techniques
  • Enhanced Routing and Dynamic Thermal Management
  • ALASH-Based Routing
  • Adaptive MROOTS-Based Routing
  • Joint DTM/DVFS
  • Reactive DVFS
  • Proactive DVFS
  • Experimental Results
  • DTM/DVFS Setup
  • Performance Evaluation
  • DVFS Opportunities
  • Latency and Energy Characteristics
  • Thermal Characteristics
  • Design Space Exploration
  • Area Overhead
  • References
  • 10 Conclusions and Possible Future Explorations
  • Design of 3D Wireless Small-World NoCs
  • DVFS Pruning
  • Static Pruning
  • Dynamic Pruning
  • Voltage Regulator Characteristics
  • DVFS Pruning Setup
  • Performance Evaluation of Static DVFS Pruning
  • Performance Evaluation of Dynamic DVFS Pruning
  • Voltage Frequency Island
  • Concluding Remarks
  • References
  • Back Cover

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