
Memory Controllers for Real-Time Embedded Systems
Predictable and Composable Real-Time Systems
Springer (Verlag)
Erschienen am 27. Oktober 2013
Buch
Softcover
XXII, 222 Seiten
978-1-4614-3009-4 (ISBN)
Beschreibung
Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation. This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system.
Weitere Details
Reihe
Sprache
Englisch
Verlagsort
New York
USA
Zielgruppe
Für Beruf und Forschung
Research
Illustrationen
XXII, 222 p.
Maße
Höhe: 235 mm
Breite: 155 mm
Dicke: 14 mm
Gewicht
376 gr
ISBN-13
978-1-4614-3009-4 (9781461430094)
DOI
10.1007/978-1-4419-8207-0
Schweitzer Klassifikation
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Benny Akesson | Kees Goossens
Memory Controllers for Real-Time Embedded Systems
Predictable and Composable Real-Time Systems
E-Book
09/2011
1. Auflage
Springer
96,29 €
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Benny Akesson | Kees Goossens
Memory Controllers for Real-Time Embedded Systems
Predictable and Composable Real-Time Systems
Buch
09/2011
Springer
106,99 €
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Personen
Sven Goossens received
his M.Sc. in Embedded Systems from the Eindhoven University of Technology in
2010. He worked as a researcher in the Electrical Engineering of the same
university until 2011, and then started as a Ph.D. student, graduating in 2015.
He is currently employed as a Hardware Architect at Intrinsic-ID. His research
interests include mixed time-criticality systems, composability and SDRAM
controllers.Karthik Chandrasekar earned
his M.Sc. degree in Computer Engineering from TU Delft in the Netherlands in
November 2009. In October 2014, he received his Ph.D. also from the same
university. His research interests include SoC Architectures,
DRAM memories & memory controllers, on-chip communication networks and
performance & power modeling and analysis. He is currently employed as a
Senior Architect at Nvidia.
Benny Akesson received
his M.Sc. degree at Lund Institute of Technology, Sweden in 2005 and a Ph.D.
from Eindhoven University of Technology, the Netherlands in 2010. Since then,
he has been employed as a Researcher at Eindhoven University of Technology, Czech
Technical University in Prague, and CISTER/INESC TEC Research
Unit in Porto. Currently, he is working as a Research Fellow at TNO-ESI.
His research interests include memory controller architectures, real-time
scheduling, performance modeling, and performance virtualization. He has
published more than 50 peer-reviewed conference papers and journal articles, as
well as two books about memory controllers for real-time embedded systems.
Kees Goossens received
his Ph.D. in Computer Science from the University of Edinburgh in 1993. He
worked for Philips/NXP Research from 1995 to 2010 on networks-onchips for consumer
electronics, where real-time performance, predictability, and costs are major
constraints. He was part-time professor at Delft University from 2007 to 2010, and
is now full professor at the Eindhoven University of Technology, where his
research focuses on composable (virtualized), predictable (real-time),
low-power embedded systems, supporting multiple models of computation. He
published 4 books, 100+ papers, and 24 patents.
Inhalt
Introduction.- Proposed Solution.- SDRAM Memories and Controllers.- Predictable SDRAM Back-End.- Resource Arbitration.- Composable Resource Front-End.- Configuration.- Related Work.- Conclusions and Future Work.- Appendix: System XML Specification.