System-Level Design Techniques for Energy-Efficient Embedded Systems
Published on 16. January 2006
XVII, 194 pages
978-0-306-48736-1 (ISBN)
Description
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.
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Other editions
Additional editions
Marcus T. Schmitz | Bashir M. Al-Hashimi | Petru Eles
System-Level Design Techniques for Energy-Efficient Embedded Systems
Book
11/2010
Springer
€106.99
Shipment within 15-20 days
Marcus T. Schmitz | Bashir M. Al-Hashimi | Petru Eles
System-Level Design Techniques for Energy-Efficient Embedded Systems
Book
12/2003
Kluwer Academic Publishers
€106.99
Shipment within 15-20 days
Content
Background.- Power Variation-Driven Dynamic Voltage Scaling.- Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling.- Energy-Efficient Multi-mode Embedded Systems.- Dynamic Voltage Scaling for Control Flow-Intensive Applications.- LOPOCOS: A Prototype Low Power Co-Synthesis Tool.- Conclusion.
