Electromigration Modeling at Circuit Layout Level
1st Edition
Published on 16. March 2013
IX, 103 pages
978-981-4451-21-5 (ISBN)
Description
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.
More details
Series
Language
English
Place of publication
Singapore
Singapore
Publishing group
Springer Singapore
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
IX, 103 p. 75 illus., 2 illus. in color.
File size
7,14 MB
ISBN-13
978-981-4451-21-5 (9789814451215)
DOI
10.1007/978-981-4451-21-5
Schweitzer Classification
Other editions
Additional editions
Cher Ming Tan | Feifei He
Electromigration Modeling at Circuit Layout Level
Book
05/2013
Springer
€53.49
Shipment within 15-20 days
Content
Introduction.- 3D Circuit Model Construction and Simulation.- Comparison of EM Performance in Circuit Structure and Test Structure.- Interconnect EM Reliability Modeling at Circuit Layout Level.- Conclusion.
