
Transition of HPC Towards Exascale Computing
Description
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The 2012 biennial high performance workshop, held in Cetraro, Italy in June 2012, focused on the challenges facing the computing research community to reach exascale performance in the next decade. This book presents papers from this workshop, arranged into four major topics: energy, scalability, new architectural concepts and programming of heterogeneous computing systems.
Chapter 1 introduces the status of present supercomputers, which are still about two orders of magnitude separated from the exascale mark. Chapter 2 examines energy demands, a major limiting factor of today's fastest supercomputers; the quantum leap in performance required for exascale computing will require a shift in architectures and technology. In Chapter 3, scalable computer paradigms for dense linear algebra on massive heterogeneous systems are presented, and Chapter 4 discusses architectural concepts. Finally, Chapter 5 addresses the programming of heterogeneous systems.
This book will be of interest to all those wishing to understand how the development of modern supercomputers is set to advance in the next decade.
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Content
- Title Page
- Preface
- Reviewers
- Contents
- Chapter 1. Supercomputing and the Exascale Challenge
- The K Computer and Beyond
- Exascale Computing & Beyond: Meeting the Challenges
- Chapter 2. The Energy Challenge
- Achieving the 20MW Target: Mobilizing the HPC Community to Accelerate Energy Efficient Computing
- Palette: A Cache Leakage Energy Saving Technique for Green Computing
- Chapter 3. Scalable Computing
- Scalable Dense Linear Algebra on Heterogeneous Hardware
- Achieving Scalability in the Presence of Asynchrony for Exascale Computing
- Chapter 4. Architectural Concepts
- The Role of Non-Strict Fine-Grain Synchronization
- On the Role of Co-Design in High Performance Computing
- Chapter 5. Programming Heterogeneous Architectures
- Uniform High-Level Programming of Many-Core and Multi-GPU Systems
- Performance and Programming Environment of a Combined GPU/FPGA Desktop
- High Performance Sequence Mining Using Pairwise Statistical Significance
- Subject Index
- Author Index
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