
Computer Memories 2
Description
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Memory, the second function of a computer, has gradually become more complex in order to meet growing needs in terms of capacity, speed, security and energy efficiency. It takes the form of a component or system, such as a memory subassembly or a mass storage device.
For several decades, there has been a strong trend towards integrating memory directly into the processor under the term embedded memory, of which cache memory is a typical example. Understanding its internal mechanisms and interfacing is essential for mastering the operation of a computer and programming it efficiently.
Computer Memories 2 focuses on the static storage cell and its associated component, known as static random-access memory. The first part presents the main temporal characteristics of a generic random-access memory, as well as its electrical and mechanical properties, including aspects related to encapsulation. The second part focuses on the study of the first category of random-access semiconductor memory: asynchronous static memory, commonly referred to by the acronym SRAM (static random-access memory). The book details its temporal, electrical and mechanical characteristics, providing an in-depth understanding of its operation and technical specifications.
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Person
Philippe Darche is Lecturer in Computer Science at the University Institute of Technology (IUT) of Paris - Rives de Seine and Researcher in the Distributed Algorithms and Systems (DeLyS) team at LIP6, Sorbonne University, France. He is also the author of fifteen books on computer architecture.
Content
- Cover
- Title Page
- Copyright Page
- Contents
- Quotation
- Preface
- Introduction
- Part 1. Characterization of a Semiconductor Memory
- Chapter 1. Timing Characterization of a Semiconductor Random-Access Memory
- 1.1. Signal naming convention
- 1.2. Timing diagram
- 1.3. Standardization of memory timing
- 1.4. Measurement of a characteristic time
- 1.5. Fundamental times
- 1.6. Conclusion
- Chapter 2. Other Characteristics of a Semiconductor Random-Access Memory
- 2.1. Electrical characteristics
- 2.2. Miscellaneous characteristics
- 2.3. Performance measurement
- 2.4. Memory testing
- 2.5. Conclusion
- Chapter 3. Encapsulation
- 3.1. Generalities
- 3.2. Interconnection technologies
- 3.2.1. Micro-wiring
- 3.2.2. Automatic tape transfer
- 3.2.3. Flip-chip technology
- 3.3. Two-dimensional single-chip encapsulation
- 3.3.1. Pin and pad packages
- 3.3.2. Encapsulation on substrate
- 3.4. Advanced integrations
- 3.4.1. Multichip module
- 3.4.2. Associated concepts
- 3.4.3. 2.5D integration
- 3.4.4. Three-dimensional integration
- 3.4.5. 3.5D package
- 3.5. Technical characteristics
- 3.6. Electrical modeling
- 3.7. Memory module
- 3.7.1. Definition
- 3.7.2. Form factor
- 3.7.3. Connectivity
- 3.8. Conclusion
- Chapter 4. Electronic Aspects of Interfacing
- 4.1. Transmission line
- 4.1.1. Modeling
- 4.1.2. Termination
- 4.2. Possible interconnection types
- 4.3. Reminder on the interface between two logical subassemblies
- 4.4. Equalization
- 4.5. Power supply
- 4.6. The SPMTT interface
- 4.7. Conclusion
- Part 2. Asynchronous Static Random-Access Memory
- Chapter 5. Internal Organization of a Generic Asynchronous Static Random-Access Memory
- 5.1. Memory cell
- 5.2. General organization
- 5.3. Read amplifier
- 5.4. Basic operations
- 5.5. Layout
- 5.6. Manufacturing technologies
- 5.7. Cell stability
- 5.8. Conclusion
- Chapter 6. Asynchronous Static Random-Access Memory as a Component
- 6.1. The asynchronous model
- 6.2. Variations on the asynchronous model
- 6.2.1. Serial-access SRAM
- 6.2.2. Backup memory
- 6.3. Conclusion
- Conclusion
- Appendices
- Appendix 1
- Appendix 2
- List of Acronyms
- References
- Index
- EULA
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