The FPGA Users Guide
2nd Edition
Book
Paperback/Softback
525 pages
978-0-12-804637-1 (ISBN)
Description
The FPGA Users Guide, Second Edition gives both an explanation of the essential technology of FPGAs and practical guidance on implementation, making it highly suitable for engineers, design managers and system engineers. The real-world insights, recommendations and best practices provided enable design teams to implement more efficient design flows that lead to earlier product deliveries, optimized performance, and extended design lifecycles.
The FPGA Users Guide, Second Edition gives both an explanation of the essential technology of FPGAs and practical guidance on implementation, making it highly suitable for engineers, design managers and system engineers. The real-world insights, recommendations and best practices provided enable design teams to implement more efficient design flows that lead to earlier product deliveries, optimized performance, and extended design lifecycles.
The FPGA Users Guide, Second Edition gives both an explanation of the essential technology of FPGAs and practical guidance on implementation, making it highly suitable for engineers, design managers and system engineers. The real-world insights, recommendations and best practices provided enable design teams to implement more efficient design flows that lead to earlier product deliveries, optimized performance, and extended design lifecycles.
More details
Series
Edition
2nd edition
Language
English
Place of publication
Oxford
United Kingdom
Publishing group
Elsevier Science & Technology
Target group
College/higher education
Dimensions
Height: 235 mm
Width: 191 mm
ISBN-13
978-0-12-804637-1 (9780128046371)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Previous edition
R. C. Cofer | Benjamin F. Harding
Rapid System Prototyping with FPGAs
Accelerating the Design Process
Book
10/2005
Newnes
€68.00
Shipment within 10-15 days
Persons
RC Cofer has 30 years of embedded design experience including real-time DSP algorithm development high-speed hardware, ASIC and FPGA design, systems engineering and project management. His technical focus is on system-level design, FPGA-based systems, high-performance hardware and signal processing. He has been educating engineers on FPGA related topics for the 17 years. RC holds an MSEE from the University of Florida and a BSEE from Florida Tech. Ben Harding has a BSEE from the University of Alabama with post graduate studies in digital signal processing, control theory, parallel processing and robotics. Ben has held leadership and design roles in a wide range of design and research projects. He has over 20 years of extensive embedded system design experience. His hardware design experience includes high-speed design with DSPs, network processors and programmable logic. Ben also has embedded software development experience in a broad range of areas including voice and signal processing algorithm development and board-support package development for numerous real-time operating systems.
RC Cofer has 30 years of embedded design experience including real-time DSP algorithm development high-speed hardware, ASIC and FPGA design, systems engineering and project management. His technical focus is on system-level design, FPGA-based systems, high-performance hardware and signal processing. He has been educating engineers on FPGA related topics for the 17 years. RC holds an MSEE from the University of Florida and a BSEE from Florida Tech. Ben Harding has a BSEE from the University of Alabama with post graduate studies in digital signal processing, control theory, parallel processing and robotics. Ben has held leadership and design roles in a wide range of design and research projects. He has over 20 years of extensive embedded system design experience. His hardware design experience includes high-speed design with DSPs, network processors and programmable logic. Ben also has embedded software development experience in a broad range of areas including voice and signal processing algorithm development and board-support package development for numerous real-time operating systems.
RC Cofer has 30 years of embedded design experience including real-time DSP algorithm development high-speed hardware, ASIC and FPGA design, systems engineering and project management. His technical focus is on system-level design, FPGA-based systems, high-performance hardware and signal processing. He has been educating engineers on FPGA related topics for the 17 years. RC holds an MSEE from the University of Florida and a BSEE from Florida Tech. Ben Harding has a BSEE from the University of Alabama with post graduate studies in digital signal processing, control theory, parallel processing and robotics. Ben has held leadership and design roles in a wide range of design and research projects. He has over 20 years of extensive embedded system design experience. His hardware design experience includes high-speed design with DSPs, network processors and programmable logic. Ben also has embedded software development experience in a broad range of areas including voice and signal processing algorithm development and board-support package development for numerous real-time operating systems.
Content
1. Introduction and Lessons Learned 2. FPGA Fundamentals and Applications 3. Optimizing the Development Cycle 4. System Engineering 5. FPGA Device-level Design Decisions 6. Board-Level Design Decisions and Allocation 7. Design Implementation 8. Design Simulation 9. Design Constraints and Optimization 10. Design Configuration 11. Board Level Design integration, Debug and Testing 12. FPGA Design Life Expectancy Obsolescence 13. (Other Topics: Design Configuration Control, Archiving, Documentation and Deliverables) 14. FPGA Design Special Topics 15. Advanced Topics Introduction and Overview 16. Cores and Intellectual Property 17. Embedded Processing Cores 18. Digital Signal Processing 19. Advanced Interconnect 20. Bringing It All Together
Appendix A - Abbreviations and Acronyms Appendix B - Design Phases, Milestones, and Gates Checklists Appendix C - References
Appendix A - Abbreviations and Acronyms Appendix B - Design Phases, Milestones, and Gates Checklists Appendix C - References