
From Frequency to Time-Average-Frequency
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Content
Foreword ix
Preface xi
Acknowledgment xvii
1 Importance of Clock Signal in Modern Microelectronic Systems 1
1.1 Clock Technology: One of the Four Fundamental Technologies in IC Design 1
1.2 Clock Signal Generator: The Knowledge-and-Skill Gap between Its Creator and Its User 3
1.3 How Is Sense-of-Time Created in Electrical World? 5
1.4 All Microelectronic Systems Are Frequency Driven 9
1.5 A New Kid in Town: The Clock Architect 14
References 15
2 Everything about the Clock 17
2.1 Clock Generation 17
2.2 Clock Distribution: Functional 18
2.3 Clock Distribution: Physical 19
2.4 Clock Usage: System Perspective 20
2.5 Clock Usage: Electrical Perspective 20
2.6 Clock Signal Quality 22
2.7 Clock Network Power Consumption 23
References 23
3 A Different Way of Constructing a Clock Signal: Time-Average-Frequency 27
3.1 Motivation 27
3.2 Clock Is Trigger and Gatekeeper: Essence of Stage-by-Stage Operation 30
3.3 Time-Average-Frequency: Brief Review 32
3.4 Circuit Architecture of Time-Average-Frequency Direct Period Synthesis 34
3.5 The Two Long-Lasting Problems: Small Frequency Granularity and Fast Frequency Switching 37
3.6 Time-Average-Frequency and "Jittery" Clock 40
3.7 Frequency Switching and Waveform Establishment in TAF-DPS Clock Generator 43
3.8 Allan Variance of TAF-DPS Clock Signal 43
3.9 Behavior of TAF Clock Signal under the Scope of Jitter 46
3.10 Spectrum of TAF Clock Signal 52
3.11 Impact of Implementation Imperfection 52
References 54
4 Time-Average-Frequency and Special Clocking Techniques: Gapped Clock Stretchable Clock and Pausible Clock 55
4.1 Gapped Clock and Synchronous FIFO 55
4.2 Stretchable Clock Pausible Clock and Asynchronous FIFO 59
4.3 Time-Average-Frequency Operation of Gapped Clock Stretchable Clock and Pausible Clock 61
References 65
5 Microelectronic System Design in the Field of Time-Average-Frequency: A Paradigm Shift 67
5.1 Digital Data Communication in the Field of Frequency 69
5.2 Data Transfer in Time-Average-Frequency Field: Transmitting Clock Available 72
5.3 Data Transfer in Time-Average-Frequency Field: Clockless Transmission 74
5.4 Clock Data Recovery in Time-Average-Frequency Field 76
5.5 Network-on-Chip GALS Strategy in Time-Average-Frequency Field 82
5.6 Network Time Synchronization in Time-Average-Frequency Field: Improved Time Granularity and Frequency Granularity 89
5.7 Crystalless Reference and Time-Average-Frequency Driven VLSI System: Source for Frequency Reference 93
5.8 Crystalless Reference and Time-Average-Frequency Driven VLSI System: Harmony in System-Level Design 96
5.9 Efficient Implementation of MCXO System in Time-Average-Frequency Field 97
5.10 CPU Throttling in Time-Average-Frequency Field 105
5.11 Spreading Clock Energy in Time-Average-Frequency Field 108
5.12 TAF-DPS as Circuit Technique in Building Special Function Blocks 114
5.12.1 TAF-DPS as DCO for PLL and DLL 114
5.12.2 TAF-DPS as Open-Loop Fractional Divider 117
5.12.3 TAF-DPS in Pulse Width Modulation 120
5.12.4 TAF-DPS for Message Transmission Using Spectrum 122
5.12.5 TAF-DPS for Message Transmission Using Duty Cycle 122
References 127
6 TAF-DPS Clock Generator and On-Chip Clock Distribution 131
6.1 Global Clock Distribution at Low Frequency 131
6.2 Resonant Clock Distribution Network Assisted by TAF-DPS 136
6.3 TAF-DPS Clock Source and FPGA 143
6.3.1 FPGA Operation and Flexibility 144
6.3.2 Prefabricated FPGA Structure and Clock/Frequency Distribution Requirement 144
6.3.3 Heterogeneous FPGA Computing and Frequency Requirement 145
6.3.4 Parallelism in FPGA and Frequency Requirement 145
6.3.5 TAF-DPS Clock Source and FPGA 145
6.3.6 Creating Clock Source of Sub-ppm Frequency Granularity and Two-Cycle Frequency Switching Speed with FPGA Custom Logic 146
References 147
7 Digital-to-Frequency Converter: A Component Enabling New Application Fields 149
8 Conclusion: Evolution of Timekeeper in Electrical World 155
Index 157
PREFACE
A PARADIGM SHIFT
The word paradigm is defined in the dictionary as "a framework containing the basic assumptions, ways of thinking, and methodology that are commonly accepted by members of a scientific community." In his influential book The Structure of Scientific Revolutions, published in 1962, Thomas Kuhn used the term paradigm shift to indicate a change in the basic assumptions (the paradigms) within the ruling theory of science. Today, the term paradigm shift is used widely, both in scientific and nonscientific communities, to describe a profound change in a fundamental model or perception of events.
Ever since the clock concept was introduced into microelectronic system design many decades ago, it was assumed that all the cycles in a clock pulse train have to be equal in their lengths (a rigorous clock signal). One reason that this form of clock signal has dominated microelectronic system design for a long time is that, in the past, the requirement for IC clocking was mostly straightforward. A clock signal with a fixed rate was sufficient for most systems. However, the complexity of future systems changes the game. Low-power operation, low electromagnetic radiation, synchronization among networked devices (e.g., Internet of Things), complex data communication schemes, etc., all require a clock signal that is flexible.
Another reason behind the dominance of this style of rigorous clock is that time, which shows its existence and its flow indirectly through the use of a clock pulse train, is not a physical entity that can be controlled and observed directly. Thus, creating a flexible clock is an inherently difficult task. It demands effort beyond simply playing with various techniques at the circuit level. Philosophically it requires an adjustment, at a fundamental level, in our thinking about the way of clocking microelectronic systems. The "anomaly" in this case is a new perspective on the concept of clock frequency. In this line of argument, the materials presented in this book induce a paradigm shift in the field of microelectronic system design.
IN ELECTRICAL WORLD WE ONLY DEAL WITH TWO THINGS: LEVEL AND TIME
Although there are numerous different types of microelectronic devices and systems supporting the daily operation of our society, we only deal with two things when designing such devices and systems: level and time. Microelectronic devices and systems perform their magic by creating a variety of events that occur inside the silicon chip in a predetermined order. The purpose of such events is to essentially specify "what happens at when." In the process of creating those events, we need "level" to represent "what" and "time" to describe "when."
In describing "what," there are two approaches to implementation: (1) the analog way and (2) the digital way. The analog method uses proportional relationships to describe the physical world. (Physical world: It is the sum of all the stuff around us; you can see it, touch it, taste it, hear it, or smell it. And these five senses are based on the proportional relationship.) By contrast, the digital approach employs a binary system (i.e., on/off) to represent information. It is the natural language for performing computation using microelectronic devices. In the past several decades of silicon chip design, the task of describing "what" has been studied in great depth. Perhaps, it is fair to say that it is a mature art now.
However, we have not been as creative in dealing with "when." Historically, we were fixed in the belief that any clock cycle has to be exactly the same as any other cycle. Hence, we restrained our hand at making the clockwork for the electrical world. Since "time" is half of the story in "what happens at when," it can impact the microelectronic system's overall information processing efficiency in great deal. A small step change in the fundamental level (the anomaly) can produce a profound influence on upper level structures. This flow of thought is reflected in the development from the ideas of Chapters 1-4 to their applications in Chapters 5-7.
INTERNET OF THINGS AND THE CLOCK
The Internet of Things (IoT) is a growing network of everyday objects, from industrial machines to consumer goods, which can share information and complete tasks without human interference. It comprises three key components: (1) the things themselves, (2) the communication networks connecting them, and (3) the computing systems that make use of the data flowing among the things. IoT is the catalyst for new business growths across multiple industries, including industrial, medical, consumer, and automotive. The semiconductor industry, which provides chips designed for various IoT applications, is the enabler of this IoT trend. Designers of microelectronic products for IoT applications, however, face several unique challenges. The three most noticeable ones are the ultralow-power challenge, the ultralow-cost challenge, and the miniaturization challenge.
As said, IoT is a network of many things. It implies that the key in IoT is the "connection." For things in IoT to connect, it requires the establishment of a "common view of time" among the things. In other words, time synchronization of the network plays a major role in IoT. There are two essential pieces for establishing this synchronization: Each thing must have its own time (frequency) source to control its internal operation and there must exist a communication protocol agreed by all the things to establish and maintain the "common view of time." The design of this communication protocol depends heavily on the quality of the time (frequency) source. In IoT's harsh design environment of ultralow power, extreme small size, and ultralow cost, building a good time (frequency) source for each thing is an extremely challenging task. It requires innovations on clocking. Chapter 5 of this book provides some innovative options to meet this challenge.
CLOCK IS ENABLER FOR SYSTEM-LEVEL INNOVATION
Viewing from a high level, there are four fundamental technologies supporting the entire IC design business: processor technology, memory technology, analog/RF technology, and clock technology. In the past several decades, a tremendous amount of effort has been spent on the development of the first three technologies. Clock technology falls behind in this race. One of the key reasons for this is that, as mentioned before, clock technology deals with a special entity: time. It is neither directly observable nor directly controllable. The circuit designer can only play with it indirectly, through voltage and/or current. This lag, however, provides us an opportunity to make significant progress. It is a battleground for new ideas. It is a potential birthplace for great inventions. It is one of the enablers for system-level innovation. Chapters 5-7 are the first round of effort in this direction.
WHAT IS NEW ON CLOCK? FLEXIBILITY VERSUS SPECTRUM PURITY
When the term flexible clock is used, it refers to a clock signal whose frequency can be (1) arbitrarily set (within a small frequency granularity, similar to the way that voltage level can be arbitrarily reached within a quantization resolution) and (2) changed quickly (similar to the way that voltage level can make transition quickly). Preferably, these two features shall be achieved simultaneously and be available to the clock user at a reasonable cost.
A rigorous clock has the characteristic of high spectrum purity, which is beneficial to certain applications such as functioning as a carrier in wireless communication and as the driving clock for analog-to-digital converter. There are, however, many more applications wherein spectrum purity is not of high concern. Instead, a clock signal possessing the capability of small frequency granularity and fast frequency switching is more useful. Therefore, there is a crucial trade-off to be made when an IC design problem is investigated. In the past, a clock of high spectrum purity was the undeniable winner. However, for future microelectronic system design, this is not necessarily always the case. Chapters 5 and 6 of this book demonstrate that a flexible clock is more cost-effective in solving many emerging problems in modern applications.
CLOCK IS NOT PLL; IT IS MUCH BIGGER
Within the community of IC design professionals, a popular view is that IC clocking is just the PLL (phase-locked loop) design. This is far from the truth. PLL design is just one piece of a big puzzle. The PLL specializes in generating the clock pulse train. There are, however, many other aspects to the clock, including the task of delivering a clock signal, logically and physically, to all the areas that need it. Another important task is the correct use of the clock signal once it actually reaches the destinations (i.e., to drive the cells). This work is important because it can cause system failure if certain conditions are not satisfied (i.e., the setup and hold checks). Moreover, as a signal bearing highly concentrated energy at a particular frequency, the clock is a danger aggressor capable of doing serious damage to other signals around it. Thus, care must be given to avoid this from happening. Furthermore, the clock network consumes the largest percentage of overall chip power consumption. The reduction of power...
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