FPGA-based Implementation of Signal Processing Systems
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Content
Preface xv
List of Abbreviations xxi
1 Introduction to Field Programmable Gate Arrays 1
1.1 Introduction 1
1.2 Field Programmable Gate Arrays 2
1.3 Influence of Programmability 6
1.4 Challenges of FPGAs 8
Bibliography 9
2 DSP Basics 11
2.1 Introduction 11
2.2 Definition of DSP Systems 12
2.3 DSP Transformations 16
2.4 Filters 20
2.5 Adaptive Filtering 29
2.6 Final Comments 38
Bibliography 38
3 Arithmetic Basics 41
3.1 Introduction 41
3.2 Number Representations 42
3.3 Arithmetic Operations 47
3.4 Alternative Number Representations 55
3.5 Division 59
3.6 Square Root 60
3.7 Fixed-Point versus Floating-Point 64
3.8 Conclusions 66
Bibliography 67
4 Technology Review 70
4.1 Introduction 70
4.2 Implications of Technology Scaling 71
4.3 Architecture and Programmability 72
4.4 DSP Functionality Characteristics 74
4.5 Microprocessors 76
4.6 DSP Processors 82
4.7 Graphical Processing Units 86
4.8 System-on-Chip Solutions 88
4.9 Heterogeneous Computing Platforms 91
4.10 Conclusions 92
Bibliography 92
5 Current FPGA Technologies 94
5.1 Introduction 94
5.2 Toward FPGAs 95
5.3 Altera Stratix® V and 10 FPGA Family 98
5.4 Xilinx UltrascaleTM/Virtex-7 FPGA Families 103
5.5 Xilinx Zynq FPGA Family 107
5.6 Lattice iCE40isp FPGA Family 108
5.7 MicroSemi RTG4 FPGA Family 111
5.8 Design Stratregies for FPGA-based DSP Systems 112
5.9 Conclusions 114
Bibliography 114
6 Detailed FPGA Implementation Techniques 116
6.1 Introduction 116
6.2 FPGA Functionality 117
6.3 Mapping to LUT-Based FPGA Technology 123
6.4 Fixed-Coefficient DSP 125
6.5 Distributed Arithmetic 130
6.6 Reduced-Coefficient Multiplier 133
6.7 Conclusions 137
Bibliography 138
7 Synthesis Tools for FPGAs 140
7.1 Introduction 140
7.2 High-Level Synthesis 141
7.3 Xilinx Vivado 143
7.4 Control Logic Extraction Phase Example 144
7.5 Altera SDK for OpenCL 145
7.6 Other HLS Tools 147
7.7 Conclusions 150
Bibliography 150
8 Architecture Derivation for FPGA-based DSP Systems 152
8.1 Introduction 152
8.2 DSP Algorithm Characteristics 153
8.3 DSP Algorithm Representations 157
8.4 Pipelining DSP Systems 160
8.5 Parallel Operation 170
8.6 Conclusions 178
Bibliography 179
9 Complex DSP Core Design for FPGA 180
9.1 Introduction 180
9.2 Motivation for Design for Reuse 181
9.3 Intellectual Property Cores 182
9.4 Evolution of IP Cores 184
9.5 Parameterizable (Soft) IP Cores 187
9.6 IP Core Integration 195
9.7 Current FPGA-based IP Cores 197
9.8 Watermarking IP 198
9.9 Summary 198
Bibliography 199
10 AdvancedModel-Based FPGA Accelerator Design 200
10.1 Introduction 200
10.2 Dataflow Modeling of DSP Systems 201
10.3 Architectural Synthesis of Custom Circuit Accelerators from DFGs 204
10.4 Model-Based Development of Multi-Channel Dataflow Accelerators 205
10.5 Model-Based Development for Memory-Intensive Accelerators 219
10.6 Summary 223
References 223
11 Adaptive Beamformer Example 225
11.1 Introduction to Adaptive Beamforming 226
11.2 Generic Design Process 226
11.3 Algorithm to Architecture 231
11.4 Efficient Architecture Design 235
11.5 Generic QR Architecture 240
11.6 Retiming the Generic Architecture 246
11.7 Parameterizable QR Architecture 253
11.8 Generic Control 266
11.9 Beamformer Design Example 269
11.10 Summary 271
References 271
12 FPGA Solutions for Big Data Applications 273
12.1 Introduction 273
12.2 Big Data 274
12.3 Big Data Analytics 275
12.4 Acceleration 280
12.5 k-Means Clustering FPGA Implementation 283
12.6 FPGA-Based Soft Processors 286
12.7 System Hardware 290
12.8 Conclusions 293
Bibliography 293
13 Low-Power FPGA Implementation 296
13.1 Introduction 296
13.2 Sources of Power Consumption 297
13.3 FPGA Power Consumption 300
13.4 Power Consumption Reduction Techniques 302
13.5 Dynamic Voltage Scaling in FPGAs 303
13.6 Reduction in Switched Capacitance 305
13.7 Final Comments 316
Bibliography 317
14 Conclusions 319
14.1 Introduction 319
14.2 Evolution in FPGA Design Approaches 320
14.3 Big Data and the Shift toward Computing 320
14.4 Programming Flow for FPGAs 321
14.5 Support for Floating-Point Arithmetic 322
14.6 Memory Architectures 322
Bibliography 323
Index 325
Preface
DSP and FPGAs
Digital signal processing (DSP) is the cornerstone of many products and services in the digital age. It is used in applications such as high-definition TV, mobile telephony, digital audio, multimedia, digital cameras, radar, sonar detectors, biomedical imaging, global positioning, digital radio, speech recognition, to name but a few! The evolution of DSP solutions has been driven by application requirements which, in turn, have only been possible to realize because of developments in silicon chip technology. Currently, a mix of programmable and dedicated system-on-chip (SoC) solutions are required for these applications and thus this has been a highly active area of research and development over the past four decades.
The result has been the emergence of numerous technologies for DSP implementation, ranging from simple microcontrollers right through to dedicated SoC solutions which form the basis of high-volume products such as smartphones. With the architectural developments that have occurred in field programmable gate arrays (FPGAs) over the years, it is clear that they should be considered as a viable DSP technology. Indeed, developments made by FPGA vendors would support this view of their technology. There are strong commercial pressures driving adoption of FPGA technology across a range of applications and by a number of commercial drivers.
The increasing costs of developing silicon technology implementations have put considerable pressure on the ability to create dedicated SoC systems. In the mobile phone market, volumes are such that dedicated SoC systems are required to meet stringent energy requirements, so application-specific solutions have emerged which vary in their degree of programmability, energy requirements and cost. The need to balance these requirements suggests that many of these technologies will coexist in the immediate future, and indeed many hybrid technologies are starting to emerge. This, of course, creates a considerable interest in using technology that is programmable as this acts to considerably reduce risks in developing new technologies.
Commonly used DSP technologies encompass software programmable solutions such as microcontrollers and DSP microprocessors. With the inclusion of dedicated DSP processing engines, FPGA technology has now emerged as a strong DSP technology. Their key advantage is that they enable users to create system architectures which allow the resources to be best matched to the system processing needs. Whilst memory resources are limited, they have a very high-bandwidth, on-chip capability. Whilst the prefabricated aspect of FPGAs avoids many of the deep problems met when developing SoC implementations, the creation of an efficient implementation from a DSP system description remains a highly convoluted problem which is a core theme of this book.
Book Coverage
The book looks to address FPGA-based DSP systems, considering implementation at numerous levels.
- Circuit-level optimization techniques that allow the underlying FPGA fabric to be used more intelligently are reviewed first. By considering the detailed underlying FPGA platform, it is shown how system requirements can be mapped to provide an area-efficient, faster implementation. This is demonstrated for a number of DSP transforms and fixed coefficient filtering.
- Architectural solutions can be created from a signal flow graph (SFG) representation. In effect, this requires the user to exploit the highly regular, highly computative, data-independent nature of DSP systems to produce highly parallel, pipelined FPGA-based circuit architectures. This is demonstrated for filtering and beamforming applications.
- System solutions are now a challenge as FPGAs have now become a heterogeneous platform involving multiple hardware and software components and interconnection fabrics. There is a need for a higher-level system modeling language, e.g. dataflow which will facilitate architectural optimizations but also to address system-level considerations such as interconnection and memory.
The book covers these areas of FPGA implementation, but its key differentiating factor is that it concentrates on the second and third areas listed above, namely the creation of circuit architectures and system-level modeling; this is because circuit-level optimization techniques have been covered in greater detail elsewhere. The work is backed up with the authors' experiences in implementing practical real DSP systems and covers numerous examples including an adaptive beamformer based on a QR-based recursive least squares (RLS) filter, finite impulse response (FIR) and infinite impulse response (IIR) filters, a full search motion estimation and a fast Fourier transform (FFT) system for electronic support measures. The book also considers the development of intellectual property (IP) cores as this has become a critical aspect in the creation of DSP systems. One chapter is given over to describing the creation of such IP cores and another to the creation of an adaptive filtering core.
Audience
The book is aimed at working engineers who are interested in using FPGA technology efficiently in signal and data processing applications. The earlier chapters will be of interest to graduates and students completing their studies, taking the readers through a number of simple examples that show the trade-off when mapping DSP systems into FPGA hardware. The middle part of the book contains a number of illustrative, complex DSP system examples that have been implemented using FPGAs and whose performance clearly illustrates the benefit of their use. They provide insights into how to best use the complex FPGA technology to produce solutions optimized for speed, area and power which the authors believe is missing from current literature. The book summarizes over 30 years of learned experience of implementing complex DSP systems undertaken in many cases with commercial partners.
Second Edition Updates
The second edition has been updated and improved in a number of ways. It has been updated to reflect technology evolutions in FPGA technology, to acknowledge developments in programming and synthesis tools, to reflect on algorithms for Big Data applications, and to include improvements to some background chapters. The text has also been updated using relevant examples where appropriate.
Technology update: As FPGAs are linked to silicon technology advances, their architecture continually changes, and this is reflected in Chapter 5. A major change is the inclusion of the ARM® processor core resulting in a shift for FPGAs to a heterogeneous computing platform. Moreover, the increased use of graphical processing units (GPUs) in DSP systems is reflected in Chapter 4.
Programming tools update: Since the first edition was published, there have been a number of innovations in tool developments, particularly in the creation of commercial C-based high-level synthesis (HLS) and open computing language (OpenCL) tools. The material in Chapter 7 has been updated to reflect these changes, and Chapter 10 has been changed to reflect the changes in model-based synthesis tools.
"Big Data" processing: DSP involves processing of data content such as audio, speech, music and video information, but there is now great interest in collating huge data sets from on-line facilities and processing them quickly. As FPGAs have started to gain some traction in this area, a new chapter, Chapter 12, has been added to reflect this development.
Organization
The FPGA is a heterogeneous platform comprising complex resources such as hard and soft processors, dedicated blocks optimized for processing DSP functions and processing elements connected by both programmable and fast, dedicated interconnections. The book focuses on the challenges of implementing DSP systems on such platforms with a concentration on the high-level mapping of DSP algorithms into suitable circuit architectures.
The material is organized into three main sections.
First Section: Basics of DSP, Arithmetic and Technologies
Chapter 2 starts with a DSP primer, covering both FIR and IIR filtering, transforms including the FFT and discrete cosine transform (DCT) and concluding with adaptive filtering algorithms, covering both the least mean squares (LMS) and RLS algorithms. Chapter 3 is dedicated to computer arithmetic and covers number systems, arithmetic functions and alternative number representations such as logarithmic number representations (LNS) and coordinate rotation digital computer (CORDIC). Chapter 4 covers the technologies available to implement DSP algorithms and includes microprocessors, DSP microprocessors, GPUs and SoC architectures, including systolic arrays. In Chapter 5, a detailed description of commercial FPGAs is given with a concentration on the two main vendors, namely Xilinx and Altera, specifically their UltraScaleTM/Zynq® and Stratix® 10 FPGA families respectively, but also covering technology offerings from Lattice and MicroSemi.
Second Section: Architectural/System-Level Implementation
This section covers efficient implementation from circuit architecture onto specific FPGA families; creation of circuit architecture from SFG representations; and system-level specification and implementation methodologies from high-level representations. Chapter 6 covers only briefly...
