Reversible Computation
Third International Workshop, Gent, Belgium, July 4-5, 2011, Revised Papers
Published on 13. April 2012
IX, 123 pages
978-3-642-29517-1 (ISBN)
Description
This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Reversible Computation, RC 2011, held in Gent, Belgium, in July 2011. The 10 revised full papers presented were carefully reviewed and selected from 25 initial submissions for inclusion in the book. The papers are devoted to all aspects of reversible computation, ranging from theoretical and experimental aspects to various applications. Topics addressed are: functional language for reversible computations, logic design, reversible circuits designed by a software toolkit called RevKit, application of reversible computation to the domain of quantum circuits, and physical realizations of reversible circuits in CMOS technologies.
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Alexis De Vos | Robert Wille
Reversible Computation
Third International Workshop, Gent, Belgium, July 4-5, 2011, Revised Papers
Book
04/2012
Springer
€53.49
Shipment within 7-9 days
Content
- Title Page
- Preface
- Table of Contents
- Time Complexity of Tape Reduction for Reversible Turing Machines
- Introduction
- Reversible Turing Machines
- One-Tape Simulation of Multitape RTMs
- Eliminating Stuck States from RTMs
- Two-Tape Simulation of Multitape RTMs
- The Hennie-Stearns Simulation
- Reversible Cleanup Implementation
- Reversible Time Complexity
- Related Work
- Conclusion
- References
- Removing the Trace
- Towards a Reversible Functional Language
- Introduction
- The Language
- Syntax
- Reversibility and Most General Matcher
- Semantics
- Reversibility and Semantics
- Examples
- r-Turing Completeness
- Conclusion
- References
- A Reversible Processor Architecture and Its Reversible Logic Design
- Introduction
- The Problem of Control
- A Simple Instruction Set Architecture, BobISA
- Arithmetic-Logic Instructions
- Branch Instructions
- Memory Instruction
- The Architecture of the Reversible Machine, Bob
- Reversible Arithmetic-Logic Unit, ALU
- Address Calculation
- Verification
- Conclusion
- References
- Optimization of Reversible Circuits Using Reconfigured Templates
- Introduction
- Background
- Quantum Templates
- Template Matching Algorithm
- Experimental Results
- Conclusion
- References
- Hybrid GF(2) - Boolean Expressions for Quantum Computing Circuits
- Introduction
- Hybrid GF(2) - Boolean Expressions
- Higher Number of Mixed Control Signals
- References
- RevKit: An Open Source Toolkit for the Design of Reversible Circuits
- Introduction
- The RevKit Framework
- The Users' Perspective: Applying RevKit
- Using the Python Interface
- Using the Graphical User Interface
- The Developers' Perspective: Extending RevKit
- Architecture and Design Concepts
- Adding a New Approach to RevKit
- Conclusions
- References
- Transforming MCT Circuits to NCVW Circuits
- Introduction
- Background
- NCVW Circuits for MCT Gates
- NCVW Circuits for MCT Circuits
- Experimental Results
- Conclusions and Future Work
- References
- Changing the Gate Order for Optimal LNN Conversion
- Introduction
- Preliminaries
- Quantum Circuit
- LNN Architecture
- Changing the Gate Order for Optimal LNN Conversion
- Problem Definition
- Dependence between Quantum Gates
- Gate Dependence Graph
- Adjacent Transposition Graph
- Overview and an Example of the Proposed Method
- The Breadth First Search by Utilizing the Adjacent Transposition Graph
- Experimental Results
- Conclusions
- References
- Towards the Limits of Cascaded Reversible (Quantum-Inspired) Circuits
- Introduction
- Setting the Criteria for the Validity of a Signal
- Setting the Limits for Amplitudes
- Setting the Limits for Delays
- Criteria for the Validity of a Signal
- The Limit Number of Cascaded Gates
- Discussion on the Positive Impact of a Lower VT
- Conclusion
- References
- Interfacing Reversible Pass-Transistor CMOS Chips with Conventional Restoring CMOS Circuits
- Introduction
- FPGA Capabilities and Limitations
- Signal Generation
- Interfacing and Timing with Internal Clock and Memory
- I/O Programming
- The Interface Board
- Bringing the FPGA Commands to the Reversible Inputs
- Bringing the Results of the Calculation to the FPGA
- The Problem of Reversibility
- Clocking the Signals
- Conclusion
- References
- Author Index
