Foreword

Terrence S. Lomheim1

Infrared and visible detector technology has continued to advance and improve at a remarkable rate over the past 25 years. The driving force behind this progress is related to the miniaturization of microelectronics - wherein the famous "Moore's Law" qualitatively describes the rate of this miniaturization. In the early 1990s, the largest infrared detector arrays had 2D layouts in the range of 256 × 256 to 512 × 512 pixels progressing toward the well-known, but now largely outdated, 640 × 480 VGA format. In the pixel counting language of today, these would be: one-tenth, one-quarter, and one-third of the size of a megapixel infrared array. Recently, single chip infrared arrays have been developed for astronomy applications that have 4096 × 4096 pixel formats (16 megapixels) and tactical airborne infrared arrays with this same format have been developed which are capable of operating at video frame rates (i.e., 30 Hz). Visible arrays in such format sizes or even larger are also available, usually implemented with smaller pixel dimensions.

As noted in the preface, Fundamentals of Infrared and Visible Detector Operation and Testing, Second Edition updates and re-emphasizes the preparatory topics that are so essential to a complete, end-to-end technical understanding of this technology by beginners as well as advanced users. The completely updated chapters covering new infrared and visible detector materials and types, readout integrated circuits, advanced testing equipment and test methods, and the use of Fourier methods for analyzing the infrared or visible detector data are aimed directly at those aspects of the technology that have evolved the most since the printing of the first edition.

Recent and steady progress has been occurring in the area of infrared detectors that use III-V semiconductor materials engineered and manufactured with strain layer superlattices (SLS) as well as nBn (or similar) photodiode architectures. These III-V infrared detectors promise: lower costs, better pixel operabilities, and comparable sensitivity performance at the same operating temperature out to the midwave infrared regime when compared to the incumbent workhorse II-VI detector systems (i.e., HgCdTe) also optimized for the same midwave spectral regime. These III-V infrared detector systems are riding on the coattails of the more robust GaAs manufacturing industry base when compared to HgCdTe. Indeed, the goal of many tactical airborne infrared detector users is to replace InSb detectors by nBn detector technology in the future. Here, nBn can operate at higher temperatures than InSb for comparable wavelength coverage and sensitivity. When it comes to visible detectors, silicon continues to be the detector material of choice except in advanced implementations where biased PIN pixel structures are used. This results in a trade-off between the bias level that is used and silicon detector thickness; in essence, a trade between "red" quantum efficiency and diffusion crosstalk. Silicon PIN detector operating temperature aimed at controlling dark current is application-specific.

Readout integrated circuit (ROIC) technology, driven by the digital silicon microelectronics industry, continues to push toward smaller minimum feature sizes. This in turn allows for increased circuit density, more on-chip functionality, dynamic operational flexibility and programmability. In the past decade, minimum feature sizes that are routinely used in the manufacturing silicon ROICs have progressed to smaller dimensions at a steady rate (from 0.5 to 0.35 to 0.25 to 0.18 and 0.15 µm). In the next few years, this will reach down to 0.13, 0.11, and even 0.090 µm. The quoted minimum features sizes are nowhere near what is currently available in purely digital microelectronic circuitry.

ROICs process the analog photocurrents from millions of photodiodes by first converting these signals to the voltage domain and then multiplexing these signals to the edge of the given ROIC for transmission off of the ROIC, to be converted to digital video in off-chip electronics. The very wide dynamic range of these analog video signals requires voltage swings on chip that are higher than what is needed for purely digital functions. These larger voltage swings require thicker gate oxides for the transistors and capacitors that form the on-chip analog video processing chains. Hence, silicon processing facilities (i.e., foundries) that offer "dual oxide" options are essential. The small feature sizes that are available in these so-called mixed mode foundries are extremely useful for saving space in pixel unit cells, for example, by allowing simple switches to be very small and for implementing on-chip analog-to-digital conversion (ADC) along with associated critical timing and synchronization (i.e., phase-locked loop or PLL) electronics. Chapter 7 has a rich discussion of all of these topics. This aspect of infrared focal plane technology has enabled a wide variety of advanced and interesting system applications.

The data acquisition electronics, testing, and test equipment required for modern large format infrared arrays are scaled-up and improved, also following the progression of Moore's law. Consider a hypothetical digital focal plane with a 15 µm linear pixel dimension and an array format of 4096 × 4096 pixels. The overall dimension of this chip is at least 6 cm by 6 cm (or 2.4 in. by 2.4 in.). Assuming that the video ADC function is performed on the ROIC with a conversion of 13-bits (this means 8192 discrete and distinct analog signal steps for each pixel amplitude) and this device operates at a rate of 30 Hz, the ensuing on-ROIC digital aggregate video rate is 6.6 gigabits/s. The extremely high rates that are required for transmission of the digital video off the ROIC favor video signal methods that have embedded clocking synchronization such as 8b/10b encoding. This typically requires overhead bits, and a good approximation is to assume 16-bits per pixel for the aforementioned example. The digital video rates that are available for transmission off-chip typically vary from 1 to 2 gigabits/second per digital video output. In the aforementioned example, the 4K × 4K infrared video detector array would have between 4 and 8 digital video outputs - usually formed as twisted pairs. The parameters in the aforementioned example are interesting to consider when it comes to testing. First, the large size of the array must be dealt with when it comes to test equipment as described in Chapter 9. The radiation sources, cryogenic dewar systems, and device mounting fixtures must be scaled up to handle the larger sizes of these advanced infrared arrays compared to prior generations. In addition, the transmission of extremely high speed digital video signals over a cold (cryogenic) to warm (external to dewar) interface is challenging.

In order to characterize this 16 megapixel infrared device over the wide range of experimental conditions described in Chapter 10, the multiple lines of very high speed digital video data must be demultiplexed and arranged into an array format corresponding to the physical layout of the device. For example, to make adequate mean signal and corresponding noise measurements at a given response flood illumination level, something like 100 successive frames of data are needed. For this step alone, a digital data cube corresponding to an array of 4096 × 4096 (spatial pixels) × 100 (time samples) × 13 bits per pixel must be collected and arranged as indicated. For this one experimental parametric condition, 22 gigabits of data must be contended with. One can imagine collecting data over 10 successive levels of illumination in order to individually characterize the linearity of the 16 megapixel responses.

Clearly, the aforementioned data must be examined by statistical methods and visualization techniques that are robust enough to ensure a full understanding of the device behavior, particularly for high-end and exacting applications. Along this line, Chapter 15 provides a description of Fourier methods for analyzing detector behavior. Such powerful techniques are crucial when considering the current state of large area infrared and visible detector technology.

The updated Fundamentals of Infrared and Visible Detector Operation and Testing, Second Edition, represents a crucial tool and reference guide to the brave new world of high-end, high-speed megapixel infrared detector technology.

Terrence S. Lomheim, Ph.D.

Fullerton, California

December, 2014