Evolvable Systems: From Biology to Hardware
5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings
Published on 8. October 2007
XIII, 468 pages
978-3-540-36553-2 (ISBN)
Description
The idea of evolving machines, whose origins can be traced to the cybernetics movementofthe1940sand1950s,hasrecentlyresurgedintheformofthenascent ?eld of bio-inspired systems and evolvable hardware. The inaugural workshop, Towards Evolvable Hardware, took place in Lausanne in October 1995, followed by the First International Conference on Evolvable Systems: From Biology to Hardware (ICES), held in Tsukuba, Japan in October 1996. The second ICES conference was held in Lausanne in September 1998, with the third and fourth being held in Edinburgh, April 2000 and Tokyo, October 2001 respectively. This has become the leading conference in the ?eld of evolvable systems and the 2003 conference promised to be at least as good as, if not better than, the four that preceeded it. The ?fth international conference was built on the success of its predec- sors, aiming at presenting the latest developments in the ?eld. In addition, it brought together researchers who use biologically inspired concepts to imp- ment real systems in arti?cial intelligence, arti?cial life, robotics, VLSI design and related domains. We would say that this ?fth conference followed on from the previous four in that it consisted of a number of high-quality interesting thought-provoking papers.
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Andy M. Tyrrell | Pauline C. Haddow | Jim Torresen
Evolvable Systems: From Biology to Hardware
5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings
Book
02/2003
Springer
€53.49
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Content
Evolution.- On Fireflies, Cellular Systems, and Evolware.- A Comparison of Different Circuit Representations for Evolutionary Analog Circuit Design.- Fault Tolerance and Fault Recovery.- Fault Tolerance via Endocrinologic Based Communication for Multiprocessor Systems.- Using Negative Correlation to Evolve Fault-Tolerant Circuits.- A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs.- Development.- Biologically Inspired Evolutionary Development.- Building Knowledge into Developmental Rules for Circuit Design.- Evolving Fractal Proteins.- A Developmental Method for Growing Graphs and Circuits.- Developmental Models for Emergent Computation.- Developmental Effects on Tuneable Fitness Landscapes.- POEtic.- POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware.- Ontogenetic Development and Fault Tolerance in the POEtic Tissue.- A Morphogenetic Evolutionary System: Phylogenesis of the POEtic Circuit.- Spiking Neural Networks for Reconfigurable POEtic Tissue.- A Learning, Multi-layered, Hardware Artificial Immune System Implemented upon an Embryonic Array.- Applications 1.- Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware.- Gene Finding Using Evolvable Reasoning Hardware.- Evolvable Fuzzy System for ATM Cell Scheduling.- Evolution of Digital Circuits.- Synthesis of Boolean Functions Using Information Theory.- Evolving Multiplier Circuits by Training Set and Training Vector Partitioning.- Evolution of Self-diagnosing Hardware.- Hardware Challenges.- Routing of Embryonic Arrays Using Genetic Algorithms.- Exploiting Auto-adaptive ?GP for Highly Effective Test Programs Generation.- Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms.- Applications 2.- Automatic Evolution of SignalSeparators Using Reconfigurable Hardware.- Distributed Control in Self-reconfigurable Robots.- Co-evolving Complex Robot Behavior.- Evolutionary Hardware.- Evolving Reinforcement Learning-Like Abilities for Robots.- Evolving Image Processing Operations for an Evolvable Hardware Environment.- Hardware Implementation of a Genetic Controller and Effects of Training on Evolution.- Neural Systems.- Real World Hardware Evolution: A Mobile Platform for Sensor Evolution.- Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware.- Simulation of a Neural Node Using SET Technology.- General Purpose Processor Architecture for Modeling Stochastic Biological Neuronal Assemblies.- Logic Design.- Use of Particle Swarm Optimization to Design Combinational Logic Circuits.- A Note on Designing Logical Circuits Using SAT.- Evolutionary Strategies.- Using Genetic Programming to Generate Protocol Adaptors for Interprocess Communication.- Using Genetic Programming and High Level Synthesis to Design Optimized Datapath.- The Effect of the Bulge Loop upon the Hybridization Process in DNA Computing.- Quantum versus Evolutionary Systems. Total versus Sampled Search.
