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Design of Advanced MOSFET Architectures

Remya Jayachandran* and Salila Hegde

Dept. of Electronics and Communication Engineering, The National Institute of Engineering, Mysore, Karnataka, India

Abstract

Multigate devices, widely called as FinFETs (Fin type field effect transistors), belong to a category of transistors used in modern microprocessors. They consist of a fin-shaped gate structure that surrounds the channel, due to which flow of electric current is controlled in better way. This design enables multigate devices to work at lower voltages with reduced power consumption and increased performance. The multiple gates also help to reduce leakage current, making them more reliable and efficient. Due to this, multigate devices have become a crucial component in the growth of ultraminiaturized, high-performance ICs (integrated circuits). Due to the advancement in technology especially by incorporating artificial intelligence in the gadgets, the requirement of high computation processors led to the replacement of FinFET with new device architecture beyond 3 nm technology node. The evolution of transistor from planar structure to multigate non-planar structures, tunnel FETs, reconfigurable FETs etc. are detailed in this chapter. These devices are used to build high performance and low-power circuits, such as, memory, digital and analog circuits. In digital circuits, multigate device has many advantages, which includes lower leakage current, improved sub threshold slope, and increased switching speed which are also discussed in this chapter.

Keywords: FinFET, GAAFET, TFET, RFET, analog circuits, digital IC

1.1 Introduction

For the past five decennium, the evolution and expansion of VLSI (very-large-scale integration) circuits have been driven by the persistent scaling down of device structures in alignment with Moore's Law [1-4]. Non-planar device structures are used in recent electronic gadgets which have processors working at high frequency, embedded systems etc. instead of conventional planar transistors [5]. Since the analog circuit part is built using planar transistors, fabrication of both analog and digital circuits demand two different process technologies which makes the cost of product high. Scaling down the device dimension can increase the frequency of operation of the device with a trade-off in increased parasitic capacitances and fabrication complexity. New device architectures such as carbon nanotubes, multi-gate devices, single electron devices, tunnel FETs and reconfigurable FETs can outdo conventional planar MOSFETs in terms of lesser area, higher speed and low power consuming devices [5-10]. Among the various multi-gate transistor structures, "Gate All Around FET" (GAAFET) device has better control of gate over the channel and channel length scaled down below 5nm. One more multi-gate device in use recently is reconfigurable field-effect transistor (RFET), which can be configured either as an p-type or n-type FET by applying suitable bias. RFET device structures with single gate to multiple gates have been detailed in the published works [11-18]. Experimental demonstration of logic circuits, current mirror circuits, memory circuits, amplifiers etc. using new device architectures and its performance analysis are available in literature [19-25]. Basic digital circuits have been demonstrated using scaled-down new transistor architectures. Analog circuit and signals are more susceptible to changes in device parameters and hence makes it hard to replace conventional transistor with new device structures. In scaled-down devices, non-linear parameters become more dominant that significantly impacts analog circuit design. As device dimensions continue to scale down, the design complexity increases more significantly for analog circuits compared to digital circuits. Despite the fact that digital circuits have already made their way to the nanoscale regime, there is still research on designing analog circuits using scaled-down device architectures [17, 22]. Electrical characterization of various nanowire FET devices and the circuit simulations using these transistors are illustrated in [26-38]. The physical size of devices has been significantly reduced due to the rapid development of smart electronic devices and gadgets. As device dimensions shrink, maintaining effective gate control over the channel becomes increasingly challenging for planar transistors. The cylindrical type GAAFET offers the lowest natural length, making it possible to scale down the device. Carrier conduction is not restricted by the Si/SiO2 interface in the GAA device, but rather by the center of the device due to its unique architecture. This alleviates interface-related issues like charge carrier mobility and interface impurities caused by the dangling bonds during development. The current technology node is 3 nm node that uses GAAFET device by name 3GAA that can replace the FinFET structure.

In this chapter, the evolution of MOSFET structures is explained in section 1.2 followed by silicon-on-insulator (SOI) MOSFET structures in section 1.3. Current multigate MOSFET structures and their challenges and future scopes are discussed in section 1.4 followed by applications of non-planar transistors in analog and digital circuits in section 1.5. The prime objective of this chapter is to introduce the new transistor architectures and challenges in existing analog and digital circuit designs using non-conventional transistors.

1.2 History of Transistors

During wartime (World wars), the need for advanced technology to create highly efficient computational devices spurred the blooming of transistors. This invention, as well as subsequent utilization of transistors in integrated circuits, marked a significant boost in the semiconductor industries. In this section, the evolution of transistors is detailed that led to the new device architectures both planar and non-planar multigate transistors.

1.2.1 Evolution of Transistors

The evolution of active electronic devices has undergone a remarkable transformation over time. The journey began with the vacuum tubes, which were superseded by the bipolar transistors (BJT) and subsequently by the advancements in the MOS (metal-oxide-semiconductor) transistor. Vacuum tubes were bulky, power-hungry, and had limited lifespan. The field of solid-state materials and devices underwent numerous explorations and breakthroughs after John Bardeen and Walter Brattain demonstrated the point-contact form of transistor in December 1947 [1]. The transistor offered a more compact, efficient, and reliable alternative to vacuum tubes, which led to the significant advancements in electronic technology. A possible alternate design was suggested by the fact that the point-contact transistor's two contacts were quite close to one another. A comparable result can be achieved with more consistent application by sandwiching an extremely thin layer of material with complimentary doping between two silicon pieces.

Building on this insight, William Shockley defined "junction" transistor. This new design, based on the p-n junction principle, offered a more robust and practical solution compared to the initial point-contact transistor. In 1956, Brattain, Bardeen and Shockley were awarded Nobel Prize for creating a device capable of generating solid-state amplification. While Shockley pioneered the bipolar transistor, Bardeen and Brattain created the point-contact transistor. William Shockley directed the efforts of Bardeen and Brattain at Bell Labs to develop a three-electrode device, which is the basis for the field-effect transistor. However, the team led by Brattain faced a significant challenge in overcoming the surface states that interfered with the gate voltage. Despite their attempts, they were unable to realize a successful insulated-gate FET. M.M.(John) Atalla and Dawon Kahng, also at Bell Labs, finally achieved the breakthrough and demonstrated the initial insulated-gate FET (IGFET) successfully in 1959. This landmark achievement paved the way for the development of the metal oxide semiconductor field effect transistor widely known as MOSFET, which has become the foundation of modern electronics and computing.

The evolution of the MOSFET has been a remarkable journey in the history of semiconductor technology. The MOSFET was first conceptualized by Julius Lilienfeld in 1925, but the first working MOSFET was demonstrated by Mohamed Atalla and Dawon Kahng at Bell Labs in 1959. Jack Kilby at Texas Instruments realized a simple (flip-flop) circuit with dual BJTs on a solo chip of germanium which led to the invention of integrated circuits in September 1958. In the 1960s, the planar MOSFET structure was developed, which allowed for the multiple transistor integration on a single chip, leading to the start of integrated circuits. Over the decades, MOSFETs have undergone continuous scaling, with the channel length being reduced from several micrometers to the nanometer scale, following Moore's law. To address the challenges of short channel effects in scaled-down planar MOSFETs, various multi-gate structures were introduced, such as the double-gate MOSFET, FinFET, and GAAFET. To address the drawbacks of conventional silicon dioxide (SiO2) gate dielectrics, metal gates and high-k dielectric materials were developed, improving the gate control and reducing leakage currents. The incorporation of strained silicon channels has been used to enhance carrier mobility...