Advanced Model Order Reduction Techniques in VLSI Design
1st Edition
Published on 6. September 2007
978-0-511-28709-1 (ISBN)
Description
Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.
More details
Language
English
Place of publication
Cambridge
United Kingdom
Publishing group
Cambridge University Press
Target group
Professional and scholarly
Illustrations
Worked examples or Exercises
File size
4,49 MB
ISBN-13
978-0-511-28709-1 (9780511287091)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
Sheldon Tan | Lei He
Advanced Model Order Reduction Techniques in VLSI Design
Book
11/2012
Cambridge University Press
€60.30
Shipment within 15-20 days
Sheldon Tan | Lei He
Advanced Model Order Reduction Techniques in VLSI Design
Book
05/2007
Cambridge University Press
€162.40
Shipment within 15-20 days
Persons
Sheldon X.-D. Tan is an associate professor in the Department of Electrical Engineering, and cooperative faculty member in the Department of Computer Science and Engineering, at the University of California, Riverside. He received his PhD in electrical and computer engineering in 1999 from the University of Iowa, Iowa City. His current research interests focus on design automation for VLSI integrated circuits. Lei He is an associate professor in the Department of Electrical Engineering at the University of California, Los Angeles, where he was also awarded his PhD in computer science in 1999. His current research interests include computer-aided design of VLSI circuits and systems.
Content
List of figures; List of tables; Preface; 1. Introduction; 2. Projection-based model order reduction algorithms; 3. Truncated balanced realization methods for model order reduction; 4. Passive balanced truncation of linear systems in descriptor form; 5. Passive hierarchical model order reduction; 6. Terminal reduction of linear dynamic circuits; 7. Vector potential equivalent circuit for inductance modeling; 8. Structure-preserving model order reduction; 9. Block structure-preserving reduction for RLCK circuits; 10. Model optimization and passivity enforcement; 11. General multi-port circuit realization; 12. Model order reduction for multi-terminal linear dynamic circuits; 13. Passive modeling by signal waveform shaping; References; Index.
