3D Integration for VLSI Systems
1st Edition
Published on 19. April 2016
350 pages
978-1-040-00010-6 (ISBN)
Description
Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers th
Reviews / Votes
"3D integration is expected to deliver performance improvement and functional enhancement in future integrated circuits and systems. This book covers a wide range of 3D integration topics authored by an impressive selection of experts. This is a great reference source for everyone following this promising technology."-Prof. L. Rafael Reif - Provost and Maseeh Professor of Emerging Technology, MIT, USA "3D integration is expected to deliver performance improvement and functional enhancement in future integrated circuits and systems. This book covers a wide range of 3D integration topics authored by an impressive selection of experts. This is a great reference source for everyone following this promising technology."
-Prof. L. Rafael Reif - Provost and Maseeh Professor of Emerging Technology, MIT, USA
More details
Edition
1. Auflage
Language
English
Place of publication
London
United Kingdom
Target group
College/higher education
Professional and scholarly
Product notice
Reflowable
ISBN-13
978-1-040-00010-6 (9781040000106)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
Chuan Seng Tan | Kuan-Neng Chen | Steven J. Koester
3D Integration for VLSI Systems
Book
09/2011
1st Edition
Pan Stanford Publishing Pte Ltd
€196.80
Shipment within 3-4 weeks
Persons
Chuan Seng Tan, Kuan-Neng Chen
Content
3D Integration Technology - Introduction and Overview. A Systems Perspective on 3D Integration: What is 3D? And What is 3D Good For? Wafer Bonding Techniques. TSV Etching. TSV Filling. 3D Technology Platform: Temporary Bonding and Release. 3D Technology Platform: Wafer Thinning, Stress Relief, and Thin Wafer Handling. Advanced Die-to-Wafer 3D Integration Platform: Self-Assembly Technology. Advanced Direct Bond Technology. Surface Modification Bonding at Low Temperature for Three-Dimensional Hetero-Integration. Through Silicon Via Implementation in CMOS Image Sensor Product. A 300-mm Wafer-Level Three-Dimensional Integration Scheme Using Tungsten Through- Silicon Via and Hybrid Cu-Adhesive Bonding. Power Delivery in 3D IC Technology with a Stratum Having an Array of Monolithic DC-DC Point-of-Load (PoL) Converter Cells. Thermal-Aware 3D IC Designs. 3D IC Design Automation Considering Dynamic Power and Thermal Integrity. Outlook.
