Exploring Memory Hierarchy Design with Emerging Memory Technologies
1st Edition
Published on 18. September 2013
VII, 122 pages
978-3-319-00681-9 (ISBN)
Description
This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc. The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the "memory wall." The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification; hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named "Moguls" is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.
More details
Series
Language
English
Place of publication
Cham
Switzerland
Publishing group
Springer International Publishing
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
VII, 122 p. 71 illus., 57 illus. in color.
File size
4,83 MB
ISBN-13
978-3-319-00681-9 (9783319006819)
DOI
10.1007/978-3-319-00681-9
Schweitzer Classification
Other editions
Additional editions
Book
10/2013
Springer
€106.99
Shipment within 10-15 days
Content
Introduction.- Replacing Different Levels of the Memory Hierarchy with NVMs.- Moguls: a Model to Explore the Memory Hierarchy for Throughput Computing.- Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory.
