
Junctionless Field-Effect Transistors
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Advancements in transistor technology have driven the modern smart-device revolution--many cell phones, watches, home appliances, and numerous other devices of everyday usage now surpass the performance of the room-filling supercomputers of the past. Electronic devices are continuing to become more mobile, powerful, and versatile in this era of internet-of-things (IoT) due in large part to the scaling of metal-oxide semiconductor field-effect transistors (MOSFETs). Incessant scaling of the conventional MOSFETs to cater to consumer needs without incurring performance degradation requires costly and complex fabrication process owing to the presence of metallurgical junctions. Unlike conventional MOSFETs, junctionless field-effect transistors (JLFETs) contain no metallurgical junctions, so they are simpler to process and less costly to manufacture.JLFETs utilize a gated semiconductor film to control its resistance and the current flowing through it. Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an inclusive, one-stop referenceon the study and research on JLFETs
This timely book covers the fundamental physics underlying JLFET operation, emerging architectures, modeling and simulation methods, comparative analyses of JLFET performance metrics, and several other interesting facts related to JLFETs. A calibrated simulation framework, including guidance on SentaurusTCAD software, enables researchers to investigate JLFETs, develop new architectures, and improve performance. This valuable resource:
* Addresses the design and architecture challenges faced by JLFET as a replacement for MOSFET
* Examines various approaches for analytical and compact modeling of JLFETs in circuit design and simulation
* Explains how to use Technology Computer-Aided Design software (TCAD) to produce numerical simulations of JLFETs
* Suggests research directions and potential applications of JLFETs
Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an essential resource for CMOS device design researchers and advanced students in the field of physics and semiconductor devices.
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Persons
SHUBHAM SAHAY, PHD, is a Post-Doctoral Research Scholar in the Department of Electrical and Computer Engineering, University of California, Santa Barbara. He has authored several peer-reviewed journal articles on topics including semiconductor device design and modeling and unconventional applications of emerging non-volatile memories.
MAMIDALA JAGADESH KUMAR, PHD, is a Professor at the Indian Institute of Technology, New Delhi and Vice-Chancellor of Jawaharlal Nehru University, New Delhi. He is Editor-in-Chief of IETE Technical Review and has widely published in the area of Micro/Nanoelectronics.
Content
Preface xi
1 Introduction to Field-Effect Transistors 1
1.1 Transistor Action 2
1.2 Metal-Oxide-Semiconductor Field-Effect Transistors 4
1.3 MOSFET Circuits: The Need for Complementary MOS 9
1.4 The Need for CMOS Scaling 11
1.5 Moore's Law 13
1.6 Koomey's Law 13
1.7 Challenges in Scaling the MOSFET 13
1.8 Conclusion 23
References 23
2 Emerging FET Architectures 27
2.1 Tunnel FETs 28
2.2 Impact Ionization MOSFET 34
2.3 Bipolar I-MOS 39
2.4 Negative Capacitance FETs 41
2.5 Two-Dimensional FETs 46
2.6 Nanowire FETs 49
2.7 Nanotube FETs 51
2.8 Conclusion 57
References 58
3 Fundamentals of Junctionless Field-Effect Transistors 67
3.1 Device Structure 69
3.2 Operation 70
3.3 Design Parameters 80
3.4 Parameters that Affect the Performance 82
3.5 Beyond Silicon JLFETS: Other Materials 100
3.6 Challenges 103
3.7 Conclusion 110
References 111
4 Device Architectures to Mitigate Challenges in Junctionless Field-Effect Transistors 125
4.1 Junctionless Accumulation-Mode Field-Effect Transistors 126
4.2 Realizing Efficient Volume Depletion 129
4.3 SOI JLFET with a High-¿¿¿¿ Box 131
4.4 Bulk Planar JLFET 137
4.5 JLFET with a Nonuniform Doping 140
4.6 JLFET with a Step Doping Profile 144
4.7 Multigate JLFET 149
4.8 JLFET with a High-¿¿¿¿ Spacer 153
4.9 JLFET with a Dual Material Gate 157
4.10 Conclusion 162
References 162
5 Gate-Induced Drain Leakage in Junctionless Field-Effect Transistors 173
5.1 Hole Accumulation 174
5.2 Parasitic BJT Action 176
5.3 Impact of BTBT-Induced Parasitic BJT Action on Scaling 177
5.4 Impact of Silicon Film Thickness on GIDL 179
5.5 Impact of Doping on GIDL 187
5.6 Impact of Spacer Design on GIDL 189
5.7 Nature of GIDL in Different NWFET Configurations 190
5.8 Device Architectures to Mitigate GIDL 199
5.9 Conclusion 248
References 249
6 Impact Ionization in Junctionless Field-Effect Transistors 255
6.1 Impact Ionization 256
6.2 Floating Body Effects in Silicon-on-Insulator MOSFETs 256
6.3 Nature of Impact Ionization in JLFETs 260
6.4 Zero Gate Oxide Thickness Coefficient 263
6.5 Single Transistor Latch-Up in JLFETs 266
6.6 Impact of Body Bias on Impact Ionization in JLFETs 267
6.7 Subband Gap Impact Ionization in DGJLFETS with Asymmetric Operation 268
6.8 Impact of Gate Misalignment on Impact Ionization in DGJLFETs 270
6.9 Spacer Design Guideline from Impact Ionization Perspective 272
6.10 Hysteresis and Snapback in JLFETs 273
6.11 Impact of Heavy-Ion Irradiation on JLFETs 275
6.12 Conclusions 276
References 276
7 Junctionless Devices Without Any Chemical Doping 281
7.1 Charge Plasma Doping 282
7.2 Charge Plasma Based p-n Diode 283
7.3 Junctionless I-MOS FET 288
7.4 Junctionless Tunnel FETs 290
7.5 JLTFET on a Highly Doped Silicon Film 294
7.6 Bipolar Enhanced JLTFET 294
7.7 Junctionless FETS Without Any Chemical Doping 297
7.8 Challenges for CPJLFETs 302
7.9 Electrostatic Doping Based FETs 312
7.10 Conclusions 319
References 319
8 Modeling Junctionless Field-Effect Transistors 327
8.1 Introduction to FET Modeling 328
8.2 Surface Potential Modeling of JLFETs 330
8.3 Charge-Based Modeling Approach 351
8.4 Drain Current Modeling Approach 355
8.5 Modeling Short-Channel JLFETs 365
8.6 Modeling Quantum Confinement 372
8.7 Conclusion 379
References 379
9 Simulation of JLFETS Using Sentaurus TCAD 385
9.1 Introduction to TCAD 386
9.2 Tool Flow 387
9.3 Sample Input Deck for Long-Channel JLFETS 391
9.4 Model Calibration 407
9.5 Model Calibration for Short-Channel JLFETs 409
9.6 Model Calibration for NWFETS 422
References 436
10 Conclusion and Perspectives 439
10.1 JLFETS As a Label-Free Biosensor 441
10.2 JLFETS As Capacitorless DRAM 443
10.3 Nanowire Junctionless NAND Flash Memory 444
10.4 Junctionless Polysilicon TFTS with a Hybrid Channel 447
10.5 JLFETS for 3D Integrated Circuits 449
10.6 Summary 450
References 451
Index 457
1
Introduction to Field-Effect Transistors
We are living in an era of information technology where smartphones, smart watches, and smart technology have become an inevitable part of our lives. You might have observed a drastic improvement in the performance of these smart devices. For instance, the shift from single core processors to multicore processors, the increase in CPU's frequency from few MHz to several GHz, the increase in the RAM from few MB to several GB, and so on. All these factors have led to a tremendous increase in the performance of these computing devices. The smart devices found in every household nowadays have a performance metric comparable to the earlier supercomputers. For instance, the Apple watch has twice the processing power of a 1985 Cray-2 supercomputer [1]. In addition, the device size has also shrunk significantly and the focus in the research and development of computing devices has shifted toward mobile devices. Moreover, the functionality per device has also increased considerably. For instance, the present day smartphones not only have processing capabilities of a supercomputer but can also perform the functions of a good quality camera, a Wi-Fi dongle, an X-BOX gaming system, and so on. To summarize, every other person in this modern era has access to low-cost, high-performance gadgets.
Have you ever wondered what drives the "smartness" and the supercomputing capabilities of all the smart technology gadgets? Let us try to understand this from a human body-gadget analogy. Just like the human body is composed of cells as the building block, the electronic gadgets are made up of transistors. In human body, the cells are grouped together to perform a particular function and form an organ. Therefore, the efficiency and the number of different functions that can be performed by the body depends exclusively on these cells. Similarly, the transistors act like a switch and are wired together in a chip (which is similar to the organ from body-gadget analogy) in a specific manner to enable a particular function. The larger the number of transistors in a gadget, the more the number of functions it can perform. The research and development in the field of transistors has driven this "smart" revolution. It is indeed very interesting how such small chunks of silicon chips drive our lives.
1.1 Transistor Action
But what exactly is a transistor? The word transistor was given by its first inventors: Shockley, Brattain, and Bardeen in 1947 [2-5]. At that time, no one would have wondered that this discovery (which actually was an accident) would be driving the lives of common people for generations to come. The transistors are often conceived as a device where the resistance between two terminals may be controlled by the current/voltage at the third terminal. Therefore, transistor refers to any three-terminal device where the current (or voltage) between two terminals may be controlled by the action of voltage (or current) at the third terminal.
In the subsequent sections, we shall see how the most common transistors work from both a qualitative approach and an energy band diagram perspective. The bipolar junction transistors (BJTs) dominated the semiconductor industry until late 1970s. Although BJTs are still used in the high-frequency circuits such as in radio frequency circuits, the throne is captured by the metal-oxide-semiconductor field-effect transistors (MOSFETs) and they continue to drive the semiconductor industry even today. Therefore, we shall discuss the MOSFETs in detail in the next section.
Transistors such as MOSFETs act as switches in the integrated circuits. However, it may be noted that the MOSFETs are not ideal switches (which are expected to consume no power when switched-OFF and deliver a high current instantaneously when switched-ON). The MOSFETs exhibit a small leakage current and, therefore, consume power from the supply even when they are switched-OFF. This power consumption is termed as the static power dissipation (Ps) given as
(1.1)where VDD is the supply voltage and IOFF is the leakage current that flows through the transistor when the switch is turned off. Furthermore, the MOSFETs also consume a significant power when switched from the ON-state to OFF-state or vice versa. This power consumption also depends on the frequency of switching of the MOSFETs and is termed as the dynamic power dissipation (Pd) given as
(1.2)where VDD is the supply voltage, f is the frequency of operation and a is the switching probability, which simply tells us that the MOSFET is not switched in each cycle, and CL is the load capacitance. In a wired network of MOSFETs, a MOSFET drives another MOSFET. Therefore, in most cases CL is the input capacitance of the MOSFET. The interested readers are requested to refer [5] for more details.
Until recent past, the focus of the researchers all over the world was to miniaturize the dimensions of the MOSFETs so as to increase the number of MOSFETs per chip, which would not only reduce the area enabling mobile devices but also increase the number of operations that may be performed by a single chip. Scaling the MOSFET dimensions also reduces the input capacitance and increases its capability (current) to drive another MOSFET in the wired chip network and helps to achieve large frequency of operation due to fast charging of CL. Although the drive current of MOSFET increases with scaling, the OFF-state current also increases drastically due to the short-channel effects that are triggered by MOSFET gate length scaling. The increase in the OFF-state current results in a significant static power dissipation. While the dynamic power dissipation was a major concern for the researchers until recent past, the scaling trends suggest that the static power dissipation would eventually surpass the dynamic power dissipation if the conventional MOSFETs are scaled aggressively.
A high static power consumption means that the MOSFETs would draw a significantly large power from the supply even when it is switched-OFF. Therefore, the chip would drain the battery or the power source even when the functionality provided by the chip is not being utilized. This is detrimental to the performance of computing devices especially for the hand-held devices like smartphones, which have a limited supply available in the form of a battery. Furthermore, the static power dissipation also heats up the chip and degrades the performance of the gadgets which are designed for room temperature operation. Of course, every consumer wants to have a smart device with an unlimited battery or power supply with no heating effects. To reduce the power dissipation, we can reduce the supply voltage as evident from equations (1.1) and (1.2). However, there lies a fundamental limitation on the MOSFETs which is inherent to the very physics of the device. The current in a MOSFET cannot increase by more than a ten-fold when the input voltage is raised by 60 mV. This limitation is due to the Maxwell-Boltzmann distribution of electrons in matter and is often referred to as the "Boltzmann tyranny." The application of MOSFET as a switch requires that the ON-state to OFF-state current ratio be high so that these states are easily distinguishable (~104 to 106). To achieve an ON-state to OFF-state current ratio of a million, the variation of the input voltage, and therefore the supply voltage, needs to be at least equal to 60 × log(106) = 360 mV. This limitation simply implies that if we have an extremely scaled supply voltage, the ratio of the ON-state current to the OFF-state current of the transistor would be very low and the MOSFET would cease to act like a switch. Therefore, the Boltzmann limit hinders the use of the conventional MOSFETs as a switch for ultralow supply voltages.
As a result, the conventional MOSFETs cannot cater the need of yielding an area and power-efficient chip with multiple functionalities. Moreover, scaling the conventional MOSFETs also requires a large investment from the manufacturing point of view. Therefore, present day research focuses on design of a low-cost and highly scalable MOSFET with minimum power dissipation. As you would have noted, the research and development in this context has gradually shifted from an area-driven perspective to a power-driven scenario.
This chapter will help to develop a basic understanding of the conventional MOSFETs. After a subtle discussion of the various modes of operation of these devices, Section 1.3 describes how basic circuits can be formed using MOSFETs. Section 1.3.2 focuses on different types of power dissipations reported earlier in the introduction.
1.2 Metal-Oxide-Semiconductor Field-Effect Transistors
To understand a MOSFET, we shall first get an in-depth understanding of a MOS capacitor (Fig. 1.1) which is the heart of a MOSFET, grasp the concept of "field-effect," and then discuss operation of MOSFETs. The MOS capacitor consists of three layers as the name suggests: metal-oxide-semiconductor. A thin insulating oxide layer is sandwiched between a metal and a semiconductor. Since the structure has a dielectric inserted between two conducting plates (assuming that the...
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