Tools for High Performance Computing 2016
Proceedings of the 10th International Workshop on Parallel Tools for High Performance Computing, October 2016, Stuttgart, Germany
Published on 6. May 2017
IX, 140 pages
978-3-319-56702-0 (ISBN)
Description
This book presents the proceedings of the 10th International Parallel Tools Workshop, held October 4-5, 2016 in Stuttgart, Germany - a forum to discuss the latest advances in parallel tools.
High-performance computing plays an increasingly important role for numerical simulation and modelling in academic and industrial research. At the same time, using large-scale parallel systems efficiently is becoming more difficult. A number of tools addressing parallel program development and analysis have emerged from the high-performance computing community over the last decade, and what may have started as collection of small helper script has now matured to production-grade frameworks. Powerful user interfaces and an extensive body of documentation allow easy usage by non-specialists.
More details
Series
Edition
1st ed. 2017
Language
English
Place of publication
Cham
Switzerland
Publishing group
Springer International Publishing
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
IX, 140 p. 60 illus., 48 illus. in color.
File size
5,58 MB
ISBN-13
978-3-319-56702-0 (9783319567020)
DOI
10.1007/978-3-319-56702-0
Schweitzer Classification
Other editions
Additional editions
Christoph Niethammer | José Gracia | Tobias Hilbrich
Tools for High Performance Computing 2016
Proceedings of the 10th International Workshop on Parallel Tools for High Performance Computing, October 2016, Stuttgart, Germany
Book
05/2017
Springer
€106.99
Shipment within 10-15 days
Content
- Intro
- Preface
- Contents
- Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels
- 1 Introduction
- 1.1 Related Work
- 1.2 Performance Models
- 1.2.1 Roofline
- 1.2.2 Execution-Cache-Memory
- 2 Kerncraft
- 2.1 Kernel Code
- 2.2 Machine Description
- Compute Architecture
- Memory Hierarchy
- Benchmarks
- 2.3 Models
- Roofline
- ECM
- Layer Conditions
- Benchmark
- 2.4 Cache Miss Prediction
- 2.4.1 Cache Simulation with Pycachesim
- 2.4.2 Layer Conditions
- 2.5 Underlying In-Core Execution Prediction
- 3 Kerncraft Usage
- 3.1 Single-Core Performance
- 3.2 Single-Socket Scaling and Saturation Point
- 3.3 Layer Conditions
- 4 Future Work
- References
- Defining and Searching Communication Patterns in Event Graphs Using the g-Eclipse Trace Viewer Plugin
- 1 Introduction
- 2 Pattern Definition
- 3 Pattern Search
- 3.1 Pattern Description
- 3.2 Execution of the Description
- 3.3 Event Sequence Search
- Modified Karp-Rabin Algorithm
- 3.4 Sequence Dependency Graph
- 3.5 Merge of Potential Matches to Pattern Instances
- 3.5.1 Constraints for Searching Patterns in Event Graphs
- 3.5.2 Dynamic Backtracking
- 4 g-Eclipse Trace Viewer Pattern Search Plugin
- 5 Examples
- 6 Future Work
- 7 Conclusion
- References
- Monitoring Heterogeneous Applications with the OpenMP Tools Interface
- 1 Introduction
- 2 Related Work
- 3 Integration of the OpenMP Tools Interface
- 3.1 Integration into the Parallel Runtime
- 3.2 Integration into the Monitoring Tool
- 4 Experimental Setup
- 5 Results
- 5.1 OmpSs Runtime Improvements
- 6 Conclusions
- References
- Extending the Functionality of Score-P Through Plugins: Interfaces and Use Cases
- 1 Introduction and Related Work
- 2 Score-P Overview
- 3 The Metric Plugin Interface
- 3.1 Metric Design Criteria
- 3.2 Calls to Plugins
- 3.3 Introduced Overhead
- 3.4 Use Case: Uncore Counter
- 3.5 Use Case: Watchpoints
- 4 The Substrate Plugin Interface
- 4.1 Substrates Design Criteria
- 4.2 Calls to Plugins
- 4.3 Introduced Overhead
- 4.4 Use Case: Region-Based Energy Efficiency Tuning
- 4.5 Use Case: Balancing-Based Energy Efficiency Tuning
- 4.6 Use Case: Event Flow Graphs
- 5 Conclusion and Further Work
- References
- Debugging Latent Synchronization Errors in MPI-3 One-Sided Communication
- 1 Introduction
- 2 MPI-3 One-Sided Communication Semantics
- 2.1 Modeling Memory Consistency
- 2.2 Consistency Properties
- 3 Uncovering Latent Synchronization Errors
- 3.1 Conceptual Overview
- 3.2 Nasty-MPI Rescheduling Process
- 3.2.1 Completion Stage
- 3.2.2 Atomicity Stage
- 3.2.3 Reordering Stage
- 4 Experimental Evaluation
- 4.1 Methodology
- 4.2 Nasty-MPI Test Cases
- 4.3 Discussion
- 5 Related Work
- 6 Conclusion and Future Work
- References
- Trace-Based Detection of Lock Contentionin MPI One-Sided Communication
- 1 Introduction
- 2 Related Work
- 3 Lock Contention
- 4 Wait-State Detection
- 4.1 The Active-Message Infrastructure
- 4.2 Detecting Lock Contention
- 5 Results
- 5.1 Micro Benchmark
- 5.2 SOR
- 6 Conclusion and Outlook
- References
- Machine Learning-Driven Automatic Program Transformationto Increase Performance in Heterogeneous Architectures
- 1 Introduction
- 2 Related Work
- 3 Source-to-Source Transformations
- 3.1 STML Rules
- 3.2 Inferring and Annotating Properties
- 3.3 High-Level Annotations
- 3.4 Implementation Notes
- 4 Rule Selection
- 5 Controlling the Transformation Process with Machine Learning
- 5.1 Mapping Code to Abstractions
- 5.2 Deciding Termination with Classification Trees
- 5.3 Reinforcement Learning
- 5.4 A Simple Example
- 6 Results
- 7 Conclusions and Future Work
- References
