Embedded Memory Design for Multi-Core and Systems on Chip
1st Edition
Published on 22. October 2013
XIII, 95 pages
978-1-4614-8881-1 (ISBN)
Description
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
More details
Series
Language
English
Place of publication
New York
United States
Publishing group
Springer US
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
XIII, 95 p. 63 illus., 37 illus. in color.
File size
3,69 MB
ISBN-13
978-1-4614-8881-1 (9781461488811)
DOI
10.1007/978-1-4614-8881-1
Schweitzer Classification
Other editions
Additional editions
Baker Mohammad
Embedded Memory Design for Multi-Core and Systems on Chip
Book
10/2013
Springer
€106.99
Shipment within 15-20 days
Content
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.
