
Machine Learning and Non-volatile Memories
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After reviewing the basics of machine learning in Chapter 1, Chapter 2 shows how neural networks can mimic the human brain; to accomplish this result, neural networks have to perform a specific computation called vector-by-matrix (VbM) multiplication, which isparticularly power hungry. In the digital domain, VbM is implemented by means of logic gates which dictate both the area occupation and the power consumption; the combination of the two poses serious challenges to the hardware scalability, thus limiting the size of the neural network itself, especially in terms of the number of processable inputs and outputs. Non-volatile memories (phase change memories in Chapter 3, resistive memories in Chapter 4, and 3D flash memories in Chapter 5 and Chapter 6) enable the analog implementation of the VbM (also called "neuromorphic architecture"), which can easily beat the equivalent digital implementation in terms of both speed and energy consumption.
SSDs and flash memories are strictly coupled together; as 3D flash scales, there is a significant amount of work that has to be done in order to optimize the overall performances of SSDs. Machine learning has emerged as a viable solution in many stages of this process. After introducing the main flash reliability issues, Chapter 7 shows both supervised and un-supervised machine learning techniques that can be applied to NAND. In addition, Chapter 7 deals with algorithms and techniques for a pro-active reliability management of SSDs. Last but not least, the last section of Chapter 7 discusses the next challenge for machine learning in the context of the so-called computational storage.
No doubt that machine learning and non-volatile memories can help each other, but we are just at the beginning of the journey; this book helps researchers understand the basics of each field by providing real application examples, hopefully, providing a good starting point for the next level of development.
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Dr. Micheloni is IEEE Senior Member, he has co-authored 100 publications in peer-reviewed journals and international conferences, and he holds 291 patents worldwide (including 139 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and 2004, the Infineon IP Award in 2007, and he was elected to the PMC-Sierra Inventor Wall of Fame in 2013. In 2020, Dr. Micheloni was selected for the European Inventor Award.
Dr. Micheloni has published the following books: 3D Flash Memories (Chinese edition by Tsinghua University Press, 2020), Inside Solid State Drives-2 nd edition- (Springer, 2018), Solid-State-Drives (SSDs) Modeling (Springer, 2017), 3D Flash Memories (Springer, 2016), Inside Solid State Drives (Springer, 2013), Inside NAND Flash Memories (Springer, 2010), Error Correction Codes for Non-Volatile Memories (Springer, 2008), Memories in Wireless Systems (Springer, 2008), VLSI-Design of Non-Volatile Memories (Springer, 2005), and Memorie in Sistemi Wireless (Franco Angeli, 2005).
Dr. Cristian Zambelli received the M.Sc. and the Ph.D. degrees in Electronic Engineering from the University of Ferrara, Ferrara, Italy, in 2008 and 2012, respectively. Since 2015, he holds an Assistant Professor position with the same institution where he teaches data storage, electronic systems reliability, and FPGA laboratory. His current research interests include the electrical characterization, physics, and reliability modelling of different non-volatile memories such as NAND/NOR flash planar and 3D integrated, phase change memories, nano-MEMS memories, resistive RAM (RRAM), and magnetic RAM. He is also interested in the evaluation of the solid-state drives reliability/performance trade-offs exposed by the integrated memory technology and the implementation of computational storage paradigms by exploiting FPGAs and GPUs.
Dr. Zambelli is an IEEE Member and authored or co-authored up to 107 publications in peer-reviewed journals, proceedings of international conferences, and book chapters. He serves in the TPC of several international conferences like IRPS, ESSDERC/ESSCIRC, and IIRW being for the latter also in the management committee. He is currently serving as Associate Editor for the IEEE Access journal since 2019.
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