
Testing Software and Systems
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Content
- Intro
- Preface
- Organization
- Do We Care Enough About "Good" Test Cases? (Invited Talk)
- Contents
- Interactive Testing and Repairing of Regular Expressions
- 1 Introduction
- 2 Background
- 3 Conformance Faults and Mutation Faults
- 4 Testing and Repairing Regular Expressions
- 4.1 Greedy Approach
- 4.2 MultiDSs Approach
- 4.3 Breadth Approach
- 4.4 Collecting Approach
- 5 Experiments
- 6 Related Work
- 7 Conclusions
- References
- Validation of Transformation from Abstract State Machine Models to C++ Code
- 1 Introduction
- 2 Abstract State Machines and Asmeta Framework
- 3 Code Generation
- 3.1 C++ Code Generation
- 3.2 C++ Unit Tests Generation
- 3.3 Code Generation Correctness
- 4 Validation of the Transformation
- 4.1 Testing the Transformation Correctness
- 4.2 Coverage Computation
- 4.3 Tools Used
- 4.4 Dealing with Internal Nondeterminism
- 5 Results
- 5.1 Discovered Faults
- 5.2 Coverage
- 6 Related Work
- 7 Conclusion
- References
- Security Testing for Chatbots
- 1 Introduction
- 2 Overview of the approach
- 3 Case Study
- 4 Related Work
- 5 Conclusion and Future Work
- References
- JMCTest: Automatically Testing Inter-Method Contracts in Java
- 1 Introduction
- 2 Inter-Method Contracts
- 3 Test Generation
- 4 Implementation and Evaluation
- 4.1 JMCTest
- 4.2 Evaluation
- 5 Related Work
- 6 Conclusion
- References
- Testing Ambient Assisted Living Solutions with Simulations
- 1 Introduction
- 2 A Unit Test Definition
- 2.1 Validation Success Criteria
- 3 Testing Infrastructure
- 4 Proof of Concept
- 5 Conclusion and Future Work
- References
- Generating OCL Constraints from Test Case Schemas For Testing Model Behavior
- 1 Introduction
- 2 Background
- 3 Test Case Schema Example
- 4 Transformation of a TC Schema into an OCL Invariant
- 5 Applying the Model Validator for Scenario Generation
- 6 Related Work
- 7 Conclusion
- References
- Test Derivation for SDN-Enabled Switches: A Logic Circuit Based Approach
- 1 Introduction
- 2 Background and Notations
- 2.1 Software Defined Networking
- 2.2 Logic Circuits and Related Fault Models
- 2.3 Notations
- 3 Related Work
- 4 Logic Circuit Based Approach for Test Suite Generation
- 4.1 Introducing a Fault Model
- 4.2 Deriving a Logic Circuit for a Switch Specification
- 4.3 Test Suite Generation
- 4.4 SAT Solving for Equivalent Mutant Detection
- 4.5 Logic Circuits for Switch Monitoring
- 5 Preliminary Experimental Results for Open vSwitch
- 5.1 Logic Circuit Fault Models for SDN-Enabled Switch Fault Model
- 5.2 Using Logic Circuits for Monitoring
- 6 Conclusion
- References
- An Energy Aware Testing Framework for Smart-Spaces
- 1 Introduction
- 2 Smart-Space: Definitions and Requirements
- 2.1 Behavioral Representation of Smart-Spaces
- 2.2 Energy-Aware Test Cases
- 3 Testing Framework
- 3.1 Testing Architecture
- 3.2 Testing Method
- 3.3 PathSim: A Simulator for Deriving Tests with Minimal Costs
- 3.4 Testing Method in Detail
- 3.5 Implementation of the Testing Environment
- 4 Experimental Evaluation
- 4.1 Case Study 1: Real vs Simulated Environment Tests
- 4.2 Case Study 2: Assessing Energy Gains in Using Energy Aware Tests
- 5 Conclusion
- References
- C++11/14 Mutation Operators Based on Common Fault Patterns
- 1 Introduction
- 2 Background and Related Work
- 2.1 Mutation Testing
- 2.2 C++11/14
- 3 Study Design
- 3.1 Evaluation Criteria
- 3.2 Data Set
- 4 Results
- 4.1 For
- 4.2 LMB
- 4.3 FWD
- 4.4 INI
- 4.5 Discussion
- 5 Conclusions and Future Work
- References
- Conformance Testing and Inference of Embedded Components
- Abstract
- 1 Introduction
- 2 Definitions
- 3 Communicating FSMs
- 4 Passive Inference with SAT-Solving
- 5 External Checking Experiment Construction
- 6 Preliminary Experiments
- 7 Active Inference of Embedded FSM
- 8 Conclusions
- Acknowledgements
- References
- Neural Networks as Artificial Specifications
- 1 Introduction
- 2 Neural Network as an Artificial Specification
- 3 Experiments
- 4 Conclusion
- References
- Combining Model Learning and Data Analysis to Generate Models of Component-Based Systems
- 1 Introduction
- 2 The COnfECt Approach
- 2.1 Overview of COnfECt
- 2.2 Trace Analysis and Extraction
- 2.3 LTS Synchronisation
- 3 Preliminary Evaluation
- 4 Conclusion
- References
- Deriving Tests with Guaranteed Fault Coverage for Finite State Machines with Timeouts
- Abstract
- 1 Introduction
- 2 Preliminaries
- 3 Fault Models and Test Derivation
- 4 Deriving Tests for FSMs with Timed Guards and Timeouts
- 5 Conclusion
- Acknowledgement
- References
- From Ontologies to Input Models for Combinatorial Testing
- 1 Introduction
- 2 Related Research
- 3 Basic Definitions
- 3.1 Ontology
- 3.2 Combinatorial Testing
- 4 Ontology Conversion
- 5 Case Study
- 6 Conclusions
- References
- Author Index
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