Introduction to Microelectronics to Nanoelectronics
Design and Technology
1st Edition
Published on 24. November 2020
372 pages
978-1-000-22307-1 (ISBN)
Description
Focussing on micro- and nanoelectronics design and technology, this book provides thorough analysis and demonstration, starting from semiconductor devices to VLSI fabrication, designing (analog and digital), on-chip interconnect modeling culminating with emerging non-silicon/ nano devices. It gives detailed description of both theoretical as well as industry standard HSPICE, Verilog, Cadence simulation based real-time modeling approach with focus on fabrication of bulk and nano-devices. Each chapter of this proposed title starts with a brief introduction of the presented topic and ends with a summary indicating the futuristic aspect including practice questions. Aimed at researchers and senior undergraduate/graduate students in electrical and electronics engineering, microelectronics, nanoelectronics and nanotechnology, this book:
Provides broad and comprehensive coverage from Microelectronics to Nanoelectronics including design in analog and digital electronics.
Includes HDL, and VLSI design going into the nanoelectronics arena.
Discusses devices, circuit analysis, design methodology, and real-time simulation based on industry standard HSPICE tool.
Explores emerging devices such as FinFETs, Tunnel FETs (TFETs) and CNTFETs including their circuit co-designing.
Covers real time illustration using industry standard Verilog, Cadence and Synopsys simulations.
Provides broad and comprehensive coverage from Microelectronics to Nanoelectronics including design in analog and digital electronics.
Includes HDL, and VLSI design going into the nanoelectronics arena.
Discusses devices, circuit analysis, design methodology, and real-time simulation based on industry standard HSPICE tool.
Explores emerging devices such as FinFETs, Tunnel FETs (TFETs) and CNTFETs including their circuit co-designing.
Covers real time illustration using industry standard Verilog, Cadence and Synopsys simulations.
More details
Edition
1. Auflage
Language
English
Place of publication
London
United Kingdom
Publishing group
Taylor & Francis Ltd
Target group
College/higher education
Illustrations
46 Tables, black and white; 243 Illustrations, black and white
ISBN-13
978-1-000-22307-1 (9781000223071)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
Manoj Kumar Majumder | Vijay Rao Kumbhare | Aditya Japa
Introduction to Microelectronics to Nanoelectronics
Design and Technology
Book
09/2023
1st Edition
CRC Press
€72.30
Shipment within 15-20 days
Manoj Kumar Majumder | Vijay Rao Kumbhare | Aditya Japa
Introduction to Microelectronics to Nanoelectronics
Design and Technology
Book
11/2020
1st Edition
CRC Press
€171.80
Shipment within 15-20 days
Persons
Manoj Kumar Majumder received his PhD from Microelectronics and VLSI group at Indian Institute of Technology, Roorkee, India. Currently, he is working as assistant professor in Department of Electronics and Communication Engineering, IIIT Naya Raipur, Chhattisgarh. He has authored more than 25 papers in peer-reviewed international journals and more than 40 papers in international conferences. He has co-authored a book titled Carbon Nanotobe Based VLSI Interconnects-Analysis and Design (New York, NY, USA: Springer, 2014) and a book-chapter published by CRC Press. His current research interests include the area of graphene based Low power VLSI devices and circuits, On-chip VLSI interconnects and Through silicon vias. Dr. Majumder is associated with different academic and administrative activities of different positions in IIIT, Naya Raipur. He is an active member of IEEE, IEEE Electron Device Society and IEEE Circuits and Systems Society. He had delivered technical talks at different conferences in India and abroad. He is also an active reviewer of IEEE Transactions on electromagnetic Compatibility, IEEE Transactions on Nanotechnology, IEEE Electron Device Letters, Microelectronics Journal, IET Micro & Nano Letters, and other Springer Journals. He is a Member of many expert committees constituted by Government and Nongovernment organizations. He has also received many awards and recognitions from International Biographical Center, Cambridge, etc. His name has been listed in Marquis Who's Who in the World.
Vijay Rao Kumbhare received the B.Tech degree in Electronics and Telecommunication Engineering from National Institute of Technology, Raipur, India in 2008, and M.Tech degree with specialization of Telecommunication System Engineering (TSE) under Electronics and Engineering Communication Department from Indian Institute of Technology, Kharagpur, West Bengal, India, in 2011. He had worked experience as assistant professor more than 5 years. He is currently working toward the Ph.D degree from Dr. Shyama Prasad Mukherjee International Institute of Information Technology Naya Raipur, India. He has attended several workshop and conferences, along with an active reviewer of reputed IET Biotechnology. His current research interest are in the area of Graphene nanoribbon, Carbon nanotube and optical based On-chip VLSI interconnects, emerging nano-materials.
Aditya Japa received B.Tech. degree in Electronics and Communication Engineering from Sree Chaitanya College of Engineering, Karimnagar (J.N.T.U Hyderabad), Telangana, India, in 2012 and the M.Tech. degree in VLSI Design from Vignan's University, Andhra Pradesh, India, in 2015. He was a JRF under a DST project titled "Design, Analysis and Benchmarking of Energy efficient Hetero-junction tunnel FET based Digital, Analog and RF Building blocks during 2015-16. He is currently pursuing Ph.D. in Electronics and Communication Engineering from DSPM International Institute of Information Technology, Naya Raipur, India. His current research interest includes Hardware security subsystems like TRNG and PUF, emerging transistor technologies (Tunnel FETs), ultra-low power/energy efficient sensor readout circuits, VLSI design etc.
Brajesh Kumar Kaushik received his Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has extensively published in several national and international journals and conferences. He is a reviewer of many international journals belonging to various publishers including IEEE, IET, Elsevier, Springer, Taylor & Francis, Emerald, ETRI, and PIER. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He holds the position of Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics such as International Journal of VLSI Design & Communication Systems (VLSICS), AIRCC Publishing Corporation. He also holds the position of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal of Engineering, Design and Technology (JEDT), Emerald Group Publishing Limited; Journal of Electrical and Electronics Engineering Research (JEEER); and Academic Journals. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who's Who in Science and Engineering (R) and Marquis Who's Who in the World (R). Dr. Kaushik has been conferred with Distinguished Lecturer award of IEEE Electron Devices Society (EDS) to offer EDS Chapters with a list of quality lectures in his research domain.
Vijay Rao Kumbhare received the B.Tech degree in Electronics and Telecommunication Engineering from National Institute of Technology, Raipur, India in 2008, and M.Tech degree with specialization of Telecommunication System Engineering (TSE) under Electronics and Engineering Communication Department from Indian Institute of Technology, Kharagpur, West Bengal, India, in 2011. He had worked experience as assistant professor more than 5 years. He is currently working toward the Ph.D degree from Dr. Shyama Prasad Mukherjee International Institute of Information Technology Naya Raipur, India. He has attended several workshop and conferences, along with an active reviewer of reputed IET Biotechnology. His current research interest are in the area of Graphene nanoribbon, Carbon nanotube and optical based On-chip VLSI interconnects, emerging nano-materials.
Aditya Japa received B.Tech. degree in Electronics and Communication Engineering from Sree Chaitanya College of Engineering, Karimnagar (J.N.T.U Hyderabad), Telangana, India, in 2012 and the M.Tech. degree in VLSI Design from Vignan's University, Andhra Pradesh, India, in 2015. He was a JRF under a DST project titled "Design, Analysis and Benchmarking of Energy efficient Hetero-junction tunnel FET based Digital, Analog and RF Building blocks during 2015-16. He is currently pursuing Ph.D. in Electronics and Communication Engineering from DSPM International Institute of Information Technology, Naya Raipur, India. His current research interest includes Hardware security subsystems like TRNG and PUF, emerging transistor technologies (Tunnel FETs), ultra-low power/energy efficient sensor readout circuits, VLSI design etc.
Brajesh Kumar Kaushik received his Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has extensively published in several national and international journals and conferences. He is a reviewer of many international journals belonging to various publishers including IEEE, IET, Elsevier, Springer, Taylor & Francis, Emerald, ETRI, and PIER. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He holds the position of Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics such as International Journal of VLSI Design & Communication Systems (VLSICS), AIRCC Publishing Corporation. He also holds the position of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal of Engineering, Design and Technology (JEDT), Emerald Group Publishing Limited; Journal of Electrical and Electronics Engineering Research (JEEER); and Academic Journals. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who's Who in Science and Engineering (R) and Marquis Who's Who in the World (R). Dr. Kaushik has been conferred with Distinguished Lecturer award of IEEE Electron Devices Society (EDS) to offer EDS Chapters with a list of quality lectures in his research domain.
Content
1. SEMICONDUCTOR PHYSICS AND DEVICES. 2. VLSI SCALING AND FABRICATION. 3. MOSFET MODELING. 4. COMBINATIONAL AND SEQUENTIAL DESIGN IN CMOS. 5. ANALOG CIRCUIT DESIGN. 6. DIGITAL DESIGN THROUGH VERILOG HDL. 7. VLSI INTERCONNECT AND IMPLEMENTATION. 8. VLSI DESIGN AND TESTABILITY. 9. NANO-MATERIALS AND APPLICATIONS. 10. NANOSCALE TRANSISTORS. 11. MCQ ANSWERS.
