Architecture-Aware Optimization Strategies in Real-time Image Processing
Published on 2. November 2017
180 pages
978-1-119-46712-0 (ISBN)
Description
In the field of image processing, many applications require real-time execution, particularly those in the domains of medicine, robotics and transmission, to name but a few. Recent technological developments have allowed for the integration of more complex algorithms with large data volume into embedded systems, in turn producing a series of new sophisticated electronic architectures at affordable prices. This book performs an in-depth survey on this topic. It is primarily written for those who are familiar with the basics of image processing and want to implement the target processing design using different electronic platforms for computing acceleration. The authors present techniques and approaches, step by step, through illustrative examples. This book is also suitable for electronics/embedded systems engineers who want to consider image processing applications as sufficient imaging algorithm details are given to facilitate their understanding.
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11/2017
Wiley
€173.48
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Chao Li | Souleymane Balla-Arabe | Fan Yang
Architecture-Aware Optimization Strategies in Real-time Image Processing
Book
10/2017
1st Edition
Wiley-ISTE
€164.50
Shipment within 3-4 weeks
Persons
Chao Li works in Institute of Acoustics of Chinese Academy of Sciences. His research interests include image processing and acoustic detection.
Souleymane Balla-Arabe is a research fellow at LE2I CNRS-UMR laboratory. His research interests are GPU-based computations, computational intelligence, machine learning, and computer vision.
Fan Yang is Full Professor at University of Burgundy. Her current research focuses on eHealth, neural network, and real-time image processing.
Content
1. Introduction of Real-time Image Processing.
2. Hardware Architectures forReal-time Processing.
3. Rapid Prototyping of Parallel Reconfigurable Instruction Set Processor for Efficient Real-Time Image Processing.
4. Exploration of High-Level Synthesis Technique.
5. CDMS4HLS: A Novel Source- To-SourceCompilation Strategy for HLS-Based FPGA Design.
6. Embedded Implementation of VHR Satellite Image Segmentation.
7. Real-time Image Processing with Very High-level Synthesis.
