Chapter 1
SiP Design and Simulation Platform

1.1 From package to SiP

Package is the term commonly used to refer to the protective housing and related accessories of a single Integrated Circuit (IC) bare chip cut down from wafer; it is mainly used to protect the silicon chips. Because silicon chips are very fragile, even very fine dust or water droplets can destroy their functionality, so it is necessary to protect IC chips with package. Another feature of package is to amplify the scale; because the chip itself is usually very small, the scale is increased by package, making it easier to use in subsequent board-level PCB systems. The third function of package is electrical connection: via package, the chip exchanges information with the outside world.

Depending on the process or material, package product is usually divided into three types: plastic package, ceramic package and metal package. Plastic package is mainly used in commercial products and has the advantage of low cost, but the thermal dissipation, stability and air tightness are relatively poor. Ceramic package and metal package are suitable for industrial products as well as in the aerospace, military and other harsh fields, have excellent heat dissipation and air tightness, and high reliability. Meanwhile, ceramic and metal package have the advantage that they can be disassembled easily for fault finding and problem "zeroing". Figure 1.1 shows the three different kinds of package.

Figure 1.1 Three different kinds of package.

IC package typically includes DIP, QFP, BGA, etc. With improvements in technology, packaging technology developed rapidly, along the DIPQFPBGACSP direction. Package density is becoming higher, scale is increasing quickly, and number of pins is growing fast. Single-chip package has not met the requirements of system design; packaging products are developing from small scale to large scale, from single-chip package to multi-chip package.

Multi-chip package has attracted more and more attention, with most directed to System in Package (SiP).

SiP, as the name suggests, refers to the integration of a system in a package body. Typically, this system requires encapsulating multiple chips able to complete a specific task, such as system-level package-integrated CPU, DRAM, Flash and other IC chips. At present, with the development of package technology, SiP has gradually developed to 3D stacked-chip package.

Multi-chip package is not a new concept; MCM (Multi-Chip Module) technology has been popular for many years, and has been widely used in specific areas such as the military, aerospace and aviation.

MCM is a kind of package; as opposed to SiP, small chips are usually used in MCM, which can accomplish relatively simple functions compared to SiP. In MCM the chips are usually in 2D layout.

The bare chips used in MCM usually have a single function, and are smaller and simple. MCM uses 2D flat package, which also means that it is not easy to increase the capability of MCM, it is difficult to shrink in size, and there are other disadvantages.

SiP combines the advantages of both MCM and large-scale IC package.

SiP package is specifically intended for large-scale, multi-chip, 3D packaging. Its stereoscopic 3D nature is mainly reflected in the two aspects of chip stacking and substrate cavity. Figure 1.2 shows the process of IC package and MCM evolving to SiP.

Figure 1.2 Evolution from IC package and MCM to SiP.

The new trend in SiP technology development is that traditional package design by IC chip manufacturers is being gradually transformed to a new arrangement whereby the system user is beginning to consider and design the package. In the past, chip manufacturers usually packaged chips and then delivered them to the user.

Now, with the development of SiP technology, miniaturization and low-power design requirements, more and more system users want to get the bare dies, and build their system based on bare dies and packaging.

It follows that market demand for bare chips will greatly increase, as more and more designers want to know how to get the bare chips.

As these demands continue to grow, traditional IC agents will continue to expand their bare chips business in order to meet the growing demands of the market.

If the demand does not reach a certain number, orders for bare chips from IC manufacturer are usually made via agents. There will be some delay for the customer. So, the SiP designer, in the early stages of project, should fully consider the order channels and order cycles. When the market demand for bare chips reaches a certain level, and when there is a continuing demand, bare chips agents would consider increasing their inventories to meet customer needs.

The bare chip market is developing, and is driven by the rapidly growing demand for SiP technology. In turn, developments in the bare chip market promote the application and popularity of SiP technology.

Because SiP or package design is gradually shifting from the IC chip manufacturer to the system user and system users are most concerned with system design, the collaboration of package design and system design will also become increasingly important. Package design itself will become a key link to system design, with designers required to realize the function of the entire system in a unified platform. Figure 1.3 shows the relationship between IC bare chips, SiP package and the PCB board-level system.

Figure 1.3 The relationship between IC bare chips, SiP package and the PCB board-level system.

SiP is getting much attention, not only from traditional package designers, but also from traditional MCM designers and PCB designers, and even SoC designers have begun to keep a watchful eye on SiP. Refer to Figure 1.4.

Figure 1.4 SiP is receiving attention from a wide range of areas.

As compared with traditional package, SiP is a system-level package, and can accomplish system functions independently.

Compared with MCM, SiP is a 3D multi-chip package, with the 3D embodied in chip stacks and substrate cavities, while the scale and function of SiP are also greatly increased compared to MCM.

Compared with PCB, the advantage of SiP technology is mainly in terms of miniaturization, low power consumption and high performance. To realize the same function as PCB, SiP only needs about 10-20% of the area and 40% of the power of a corresponding PCB, and also has a relatively large performance improvement over PCB.

Compared with SoC, the advantage of SiP is mainly embodied in short cycles, low cost and ease of success. To achieve the same function, only 10-20% of the development time required for SoC is needed for SiP, the cost of SiP development is typically about 10-15% that of SoC, and SiP is more likely to succeed. Therefore, SiP is often seen as a low-cost, short-term, alternative solution to SoC by many users.

Often, SiP is a forerunner at the start of an SoC project, used to make a rapid and low-cost SiP product. When SiP is successful, giving some initial results on the project, and receiving recognition and support from all, the project then shifts to SoC research and development.

With increasing demand for high-performance, high-speed and versatile design, designers are more concerned about signal integrity, power integrity, crosstalk, EMC/EMI, and functional simulation and verification. A common solution is to use simulation tools to assist in the design flow; HyperLynx SI/PI/Thermal, HyperLynx DRC, HyperLynx 3DEM solver and HyperLynx Analog are commonly used simulation tools.

For high-density, small-size and low-power-consumption design, designers require design rules such as trace width and clearance, smaller passive components, for example, resistors and capacitors, HDI (High Density Interconnection) technology, and buried and blind via technology.

Moreover, design software and product technics support the use of many passive components embedded in the substrate; this is called EP (Embedded Passive) technology, and consists of bare dies mounted directly on the circuit board; this is called COB (Chip On Board) technology.

With the application and maturity of these technologies, PCB system designers began to focus on a new technology, which is the integration of all these technologies: this is SiP technology.

In contrast with PCB, to realize the same function SiP requires only 10%~20% area and 40% power consumption of original PCB; refer to Figure 1.5.

Figure 1.5 Size and power consumption comparison between PCB and SiP.

1.2 The development of mentor SiP design technology

The Mentor company is the largest EDA software supplier of PCB board-level system design in the world. Mentor provides the most advanced solutions for electronics companies and research institutions worldwide.

Mentor has held the absolute leading position in the PCB design market for many years. Statistical data from the global PCB design market (third-party statistics) show that Mentor has more than 50% of the market share, dominating the market and far outstripping competitors.

In May 2009, based on version EE2007.5, Mentor launched the Expedition advanced packaging bundle (Expedition AdvPkg) to support SiP design. Before launching this module, Mentor had no tool for package or SiP design specifically; however, Mentor's related technology can be traced back a few...