Cognitive Computing Models in Communication Systems
Description
A concise book on the latest research focusing on problems and challenges in the areas of data transmission technology, computer algorithms, AI-based devices, computer technology, and their solutions.
The book provides a comprehensive overview of state-of-the-art research work on cognitive models in communication systems and computing techniques. It also bridges the gap between various communication systems and solutions by providing the current models and computing techniques, their applications, the strengths and limitations of the existing methods, and the future directions in this area.
The contributors showcase their latest research work focusing on the issues, challenges, and solutions in the field of data transmission techniques, computational algorithms, artificial intelligence (AI)-based devices, and computing techniques.
Readers will find in this succinctly written and unique book:
* Topics covering the applications of advanced cognitive devices, models, architecture, and techniques.
* A range of case studies and applications that will provide readers with the tools to apply cutting-edge models and algorithms.
* In-depth information about new cognitive computing models and conceptual frameworks and their implementation.
Audience
The book is designed for researchers and electronics engineers, computer science engineers, industrial engineers, and mechanical engineers (both in academia and industry) working in the fields of machine learning, cognitive computing, mobile communication, and wireless network system.
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Persons
Budati Anil Kumar, PhD, is an associate professor in the ECE Department, Gokaraju Rangaraju Institute of Engineering & Technology (Autonomous), Hyderabad, India. He has more than 12 years of experience in teaching and six years of experience in research and has published more than 50 research articles in journals and conferences. His current research interests include cognitive radio networks, software-defined radio networks, artificial intelligence, 6G emerging technologies, mulsemedia computing, and UAVs in 5G and 6G.
S. B. Goyal, PhD, is Director, Faculty of Information Technology, City University, Malaysia. He has more than 20 experience and has published 100+ papers in journals and conferences.
Sardar M.N. Islam, PhD, is Director of Decision Sciences and Modelling Program at Victoria University, Australia. He has authored 31scholarly academic books in different disciplines, as well as more than 250 journal articles in his specialized research areas.
Content
Preface xi
Acknowledgement xiii
1 Design of a Low-Voltage LDO of CMOS Voltage Regulator for Wireless Communications 1
S. Pothalaiah, Dayadi Lakshmaiah, B. Prabakar Rao, D. Nageshwar Rao, Mohammad Illiyas and G. Chandra Sekhar
1.1 Introduction 2
1.2 LDO Controller Arrangement and Diagram Drawing 2
1.3 Conclusion 14
2 Performance Analysis of Machine Learning and Deep Learning Algorithms for Smart Cities: The Present State and Future Directions 15
Pradeep Bedi, S. B. Goyal, Sardar MN Islam, Jia Liu and Anil Kumar Budati
2.1 Introduction 16
2.2 Smart City: The Concept 16
2.3 Application Layer 18
2.4 Issues and Challenges in Smart Cities: An Overview 21
2.5 Machine Learning: An Overview 22
2.6 Unsupervised Learning 26
2.7 Deep Learning: An Overview 26
2.8 Deep Learning vs Machine Learning 29
2.9 Smart Healthcare 30
2.10 Smart Transport System 33
2.11 Smart Grids 36
2.12 Challenges and Future Directions 40
2.13 Conclusion 41
3 Application of Machine Learning Algorithms and Models in 3D Printing 47
Chetanpal Singh
3.1 Introduction 48
3.2 Literature Review 50
3.3 Methods and Materials 65
3.4 Results and Discussion 69
3.5 Conclusion 70
4 A Novel Model for Optimal Reliable Routing Path Prediction in MANET 75
S.R.M. Krishna, S. Pothalaiah and R. Santosh
4.1 Introduction 76
4.2 Analytical Hierarchical Process Technique 77
4.3 Mathematical Models and Protocols 78
4.4 Routing Protocols 80
4.5 RTF-AHP Model 81
4.6 Models for Optimal Routing Performance 83
4.7 Results and Discussion 85
4.8 Conclusion 88
5 IoT-Based Smart Traffic Light Control 91
Sreenivasa Rao Ijjada and K. Shashidhar
5.1 Introduction 92
5.2 Scope of the Proposed Work 93
5.3 Proposed System Implementation 94
5.4 Testing and Results 99
5.5 Test Results 100
5.6 Conclusion 104
6 Differential Query Execution on Privacy Preserving Data Distributed Over Hybrid Cloud 107
Sridhar Reddy Vulapula, P. V. S. Srinivas and Jyothi Mandala
6.1 Introduction 107
6.2 Related Work 108
6.3 Proposed Solution 110
6.4 Novelty in the Proposed Solution 115
6.5 Results 115
6.6 Conclusion 119
7 Design of CMOS Base Band Analog 123
S. Pothalaiah, Dayadi Lakshmaiah, Bandi Doss, Nookala Sairam and K. Srikanth
7.1 Introduction 124
7.2 Proposed Technique of the BBA Chain for Reducing Energy Consumption 125
7.3 Channel Preference Filter 130
7.4 Programmable Amplifier Gain 132
7.5 Executed Outcomes 133
7.6 Conclusion 135
8 Review on Detection of Neuromuscular Disorders Using Electromyography 137
G. L. N. Murthy, Rajesh Babu Nemani, M. Sambasiva Reddy and M. K. Linga Murthy
8.1 Introduction 138
8.2 Materials 139
8.3 Methods 140
8.4 Conclusion 142
9 Design of Complementary Metal-Oxide Semiconductor Ring Modulator by Built-In Thermal Tuning 145
P. Bala Murali Krishna, Satish A., R. Yadgiri Rao, Mohammad Illiyas and I. Satya Narayana
9.1 Introduction 146
9.2 Device Structure 147
9.3 dc Performance 149
9.4 Small-Signal Radiofrequency Assessments 149
9.5 Data Modulation Operation (High Speed) 150
9.6 Conclusions and Acknowledgments 152
10 Low-Power CMOS VCO Used in RF Transmitter 155
D. Subbarao, Dayadi Lakshmaiah, Farha Anjum, G. Madhu Sudhan Rao and G. Chandra Sekhar
10.1 Introduction 156
10.2 Transmitter Architecture 157
10.3 Voltage-Controlled Ring Oscillator Design 158
10.4 CMOS Combiner 161
10.5 Conclusion 163
11 A Novel Low-Power Frequency-Modulated Continuous Wave Radar Based on Low-Noise Mixer 165
Dayadi Lakshmaiah, Bandi Doss, J.V.B. Subrmanyam, M.K. Chaitanya, Suresh Ballala, R. Yadagirir Rao and I. Satya Narayana
11.1 Introduction 166
11.2 FMCW Principle 168
11.3 Results 174
11.4 Conclusion 178
12 a Highly Integrated Cmos Rf T X Used for IEEE 802.15.4 181
Dayadi Lakshmaiah, Subbarao, C.H. Sunitha, Nookala Sairam and S. Naresh
12.1 Introduction 182
12.2 Related Work 182
12.3 Simulation Results and Discussion 185
12.4 Conclusion 186
13 A Novel Feedforward Offset Cancellation Limiting Amplifier in Radio Frequencies 189
Dayadi Lakshmaiah, L. Koteswara Rao, I. Satya Narayana, B. Rajeshwari and I. Venu
13.1 Introduction 190
13.2 Hardware Design 190
13.3 Experimental Results 195
13.4 Conclusion 195
14 A Secured Node Authentication and Access Control Model for IoT Smart Home Using Double-Hashed Unique Labeled Key-Based Validation 199
Sulaima Lebbe Abdul Haleem
14.1 Introduction 200
14.2 Challenges in IoT Security and Privacy 203
14.3 Background 209
14.4 Proposed Model 210
14.5 Results 21
14.6 Conclusion 218
14.7 Claims 218
References 219
Index 221
1
Design of a Low-Voltage LDO of CMOS Voltage Regulator for Wireless Communications
S. Pothalaiah1, Dayadi Lakshmaiah2*, B. Prabakar Rao3, D. Nageshwar Rao4, Mohammad Illiyas5 and G. Chandra Sekhar6
1Electronics and Communication Engineering Dept., Vignana Bharathi Institute of Technology, Hyderabad, India
2Electronics and Communication Engineering Dept., Sri Indu Institute of Engineering and Technology, Hyderabad, India
3Electronics and Communication Engineering Dept., JNTUH, Hyderabad, India
4Electronics and Communication Engineering Dept., TKRCET, Hyderabad, India
5Electronics and Communication Engineering Shadan College of Engineering and Technology, Hyderabad, India
6Electronics and Communication Engineering Dept., Sri Indu Institute of Engineering and Technology, Hyderabad, India
Abstract
In this document, a low-voltage, low-dropout (LDO) voltage regulator process is proposed and executed by means of a 0.25-µm complementary metal-oxide semiconductor (CMOS). This debate of a 3- to 5-V, 50-mA small CMOS give up a single 1-pF compensating capacitor in a linear voltage regulator. Tentative outcomes prove that the highest yield load current is 50 mA and the control yield electrical energy is 2.8 V. The controller provides a total weight fleeting reaction by lower than a 5-mV overshoot in addition to the undershoot. The lively outline part is 358.28 µm × 243.30 µm. Voltage regulators are used to provide a stable power supply voltage independent of load impedance, input voltage variations, temperature, and time. LDO regulators are distinguished by their ability to maintain regulation with small differences between the supply voltage and the load voltage. LDO is used for wireless communications and satellite. In this chapter, the authors discuss how LDO works.
Keywords: LDO, low-voltage regulator, CMOS, linear controller, power supply circuits, regulator
1.1 Introduction
A low-dropout (LDO) controller is a direct current linear electrical energy regulator that is able to run through extremely minute input-output discrepancies of electrical energy. Claim intended small-voltage, small fall-away regulator is rising since rising consists of convenient electronics, i.e., mobile or radio. The same manufacturing also has self-profiling relevance [1]. Lately, growing requirement meant for handy plus sequence operate yield contain required circuit toward work below short-voltage situations, and elevated current competence have as well grown essential toward capitalizing the life span of battery [1]. The regulator ought to enclose a tiny dynamic region.
Low drop-out aim has turned into additional demand owing to the rising insistence of high-performance small dropouts, of which small-voltage fast-instantaneous LDOs are particularly significant methods to pick up the traditional LDO configuration contain to be projected. However, with structural restriction, which is the major problem in concurrently achieving steadiness, more output voltage correctness plus small retort point, at a halt can't exist defeat [2]. The structural restraint of traditional small dropouts is mostly due to the connected solitary pole-zero termination scheme, into the break off capacitor through the elevated corresponding sequence confrontation necessary for obtaining small regularity pole-zero termination. The resulting sphere expansion was not satisfactorily elevated toward reaching a fine line and load system, and the loop gain bandwidth was not satisfactorily large for little reaction time in adding, essential elevated equivalent series resistance (ESR) introduces useless response. A low-voltage plan is moreover imperfect due to the voltage buffer surrounded by traditional LDOs [3]. An additional enhancement on top of the traditional structure is not easy due to the limitation of the constancy of LDO. Therefore, to accomplish fine specifications, a novel LDO among the extremely easy circuit configurations was engaged. The organization has twice over pole-zero termination schemes, along with a blueprint providing how save for present is a instant.
1.2 LDO Controller Arrangement and Diagram Drawing
The configuration of the planned LDO is displayed below (Figure 1.1). It is self-possessed into two phases: the first phase, as in a traditional LDO, comprise an error electronic equipment applied to supply fault electronic equipment for voltage regulation, while the second phase is a common source amplifier that incorporates a lot of the output sway. Thanks to the cascade design, amplification depends on the harvest of electrical energy gain of the two gain phases.
Figure 1.1 Schematic diagram of the low dropout control [2].
The circuit in Figure 1.2 shows a liability amplifier of the discrepancy couple M2 and M3 through dynamic loads M4 and M5, whereas the second gain phase is the common source (CS) phase M6 in the bias current spring M7. The output swing of the second phase was greatly enhanced compared to the source admire into the revolving ON/OFF power transistor, and so this arrangement is appropriate for low-voltage LDOs. The current mirrors M, M7, and M8 offer current bias for the two phases.
Maximum power transfer (MPT) was planned to function within the saturation state at fall away. While the voltage gain of the MPT is less than unanimity, the gain is not tainted because of the error electronic equipment in addition to the second gain phase. A mere gain of 60 dB was achieved in the projected plan, which is adequate for high-quality line and load regulations [1]. In the design blueprint, for fine transitory reaction presentation, the transistor dimensions reached centimeters, which generates larger gate capacitors. At gate, the swing rate of MPT and freq reaction for low dropout disadvantage meant of designed LDO Vin workings as of 3-5 V, it projected LDOs control range.
Figure 1.2 Representation of the planned low-dropout (LDO) control device [3-5].
1.2.1 Design of the LDO Regulator
Intent of small dropout is capable of subdivided keen on the drawing of power transistor (MPT) and intent of two-phase operational amplifier.
1.2.1.1 Design of the Fault Amplifier
During this part, the method was modernized to allow determination of the first-cut design of the second-phase operational amplifier. The tender estimate approached 70% of the design method. The two-phase operational amplifier was subsequently developed (Table 1.1).
BW, bandwidth; GB, gain bandwidth; ICMR, input common mode range; Pdiss, power dissipation; Cl, load capacitor; SR, swing rate; Vout, output voltage; Vdd, drain voltage; Vss, source voltage
(1.1)Thereafter, the smallest value of the extremity current I5 was determined based on the swing rate requirements.
Table 1.1 Requirements for the design of the two-phase operational amplifier [5-8].
Parameter Symbol Value Operational amplifier gain Av =2,220 V/V Gain GB 5 MHz BW Pdiss =1.2 mW Power Indulgence Cl 10 pF Load Capacitance SR =10 V/µs Swing rate Vout ±2 V Output voltage Range ICMR -2.5 to 3.2 Input common +2.5 V Mode range Vdd +2.5 V Positive Vss Voltage -2.5 VFigure 1.3 Diagram of fault amplifier [5-8].
(1.2)The characteristic ration of M3 is able to be resolved with the requirement meant for optimistic input common mode series.
(1.3)The requirements of the transconductance i/p transistor are resolved with the idea of Cc and GB. Transconductance, gm1, was computed using the following equation:
(1.4)The feature percentage (W/L)1 was directly calculated using gm1 as follows:
The aspect ratio (W/L)1 was
(1.5)The required sequence is now obtained near computing the diffusion electrical energy of transistor M5. Due to the unfavorable ICMR equation, VDS5 was computed using the following association:
(1.6)With the obtained VDS5, (W/L)5 can then be extracted using the equation below:
(1.7)Thereafter, the first stage of the...
