Programming Massively Parallel Processors
A Hands-on Approach
3rd Edition
Published on 24. November 2016
576 pages
978-0-12-811987-7 (ISBN)
Description
Programming Massively Parallel Processors: A Hands-on Approach, Third Edition shows both student and professional alike the basic concepts of parallel programming and GPU architecture, exploring, in detail, various techniques for constructing parallel programs.
Case studies demonstrate the development process, detailing computational thinking and ending with effective and efficient parallel programs. Topics of performance, floating-point format, parallel patterns, and dynamic parallelism are covered in-depth.
For this new edition, the authors have updated their coverage of CUDA, including coverage of newer libraries, such as CuDNN, moved content that has become less important to appendices, added two new chapters on parallel patterns, and updated case studies to reflect current industry practices.
- Teaches computational thinking and problem-solving techniques that facilitate high-performance parallel computing
- Utilizes CUDA version 7.5, NVIDIA's software development tool created specifically for massively parallel environments
- Contains new and updated case studies
- Includes coverage of newer libraries, such as CuDNN for Deep Learning
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Book
12/2016
3rd Edition
Morgan Kaufmann
€77.98
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Persons
David B. Kirkis known for major contributions to graphics, hardware, and algorithms. Before pursuing his Ph.D. at Caltech, he earned B.S. and M.S. degrees in mechanical engineering from MIT and worked at Raster Technologies and Hewlett-Packard's Apollo Systems Division. After completing his doctorate, he served as chief scientist and head of technology at Crystal Dynamics. In 1997, he became Chief Scientist at NVIDIA. Dr. Kirk has received numerous honors including the IEEE Seymour Cray Computer Engineering Award and ACM SIGGRAPH Computer Graphics Achievement Award. He is a member of the U.S. National Academy of Engineering.Wen-mei W. Hwuis a Senior Director of Research of NVIDIA and the Sanders-AMD Endowed Chair Professor Emeritus of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. His work focuses on parallel computing-covering architecture, implementation, compilers, and algorithms. Dr. Hwu has received numerous honors, including the ACM/IEEE Eckert-Mauchly Award, ACM Grace Murray Hopper Award, IEEE B.R. Rau Award. He is an IEEE and ACM Fellow. He earned his Ph.D. in Computer Science from UC Berkele
Content
1. Introduction2. Data parallel computing3. Scalable parallel execution4. Memory and data locality5. Performance considerations6. Numerical considerations7. Parallel patterns: convolution: An introduction to stencil computation8. Parallel patterns: prefix sum: An introduction to work efficiency in parallel algorithms9. Parallel patterns-parallel histogram computation: An introduction to atomic operations and privatization10. Parallel patterns: sparse matrix computation: An introduction to data compression and regularization11. Parallel patterns: merge sort: An introduction to tiling with dynamic input data identification12. Parallel patterns: graph search13. CUDA dynamic parallelism14. Application case study-non-Cartesian magnetic resonance imaging: An introduction to statistical estimation methods15. Application case study-molecular visualization and analysis16. Application case study-machine learning17. Parallel programming and computational thinking18. Programming a heterogeneous computing cluster19. Parallel programming with OpenACC20. More on CUDA and graphics processing unit computing21. Conclusion and outlook
