System Specification and Design Languages
Selected Contributions from FDL 2010
1st Edition
Published on 2. December 2011
XII, 256 pages
978-1-4614-1427-8 (ISBN)
Description
This book brings together a selection of the best papers from the thirteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in Southampton, UK in September 2010. FDL is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
More details
Series
Language
English
Place of publication
New York
United States
Publishing group
Springer US
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
XII, 256 p.
File size
8,65 MB
ISBN-13
978-1-4614-1427-8 (9781461414278)
DOI
10.1007/978-1-4614-1427-8
Schweitzer Classification
Other editions
Additional editions
Tom J. Kazmierski | Adam Morawiec
System Specification and Design Languages
Selected Contributions from FDL 2010
Book
03/2014
Springer
€160.49
Shipment within 15-20 days
Tom J. Kazmierski | Adam Morawiec
System Specification and Design Languages
Selected Contributions from FDL 2010
Book
12/2011
Springer
€160.49
Shipment within 15-20 days
Content
Formal Hardware/Software Co-verification of Application Specific Instruction Set Processors.- Evaluating Debugging Algorithms from a Qualitative Perspective.- Mapping of Concurrent Object-oriented Models to Extend Real-time Task Networks.- SystemC-A Modelling of Mixed-technology Systems with Distributed Behaviour.- A Framework for Interactive Refinement of Mixed HW/SW/Analog Systems.- Bottom-up Verification for CMOS Photonic Linear Heterogeneous System.- Towards Abstract Analysis Techniques for Range Based System Simulations.- Modeling Time-triggered Architecture Based Real-time Systems Using SystemC.- Towards the Development of a Set of Transaction Level Models - A Feature-oriented Approach.- Rapid Prototyping of Complex HW/SW Systems Using a Timing and Power Aware ESL Framework.- Towards Accurate Source-level Annotation of Low-level Properties Obtained from Optimized Binary Code.- Architecture Specifications in C?aSH.- SyReC: A Programming Language for Synthesis of Reversible Circuits.- Logical Time @ Work: Capturing Data Dependencies and Platform Constraints.- Formal Support for Untimed MARTE-SystemC Interoperability.
