Speculative Execution in High Performance Computer Architectures
Published on 26. May 2005
456 pages
978-1-4200-3515-5 (ISBN)
Description
Until now, there were few textbooks that focused on the dynamic subject of speculative execution, a topic that is crucial to the development of high performance computer architectures. Speculative Execution in High Performance Computer Architectures describes many recent advances in speculative execution techniques. It covers cutting-edge research
More details
Series
Language
English
Place of publication
London
United Kingdom
Publishing group
Taylor & Francis Ltd
Target group
Professional and scholarly
Computer science students, researchers, and professionals; electrical engineers. Professionals in computer architecture, compilers, and application programs.
Illustrations
94 s/w Abbildungen
94 b/w images
File size
6,37 MB
ISBN-13
978-1-4200-3515-5 (9781420035155)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
David Kaeli | Pen-Chung Yew
Speculative Execution in High Performance Computer Architectures
Book
05/2005
1st Edition
Chapman & Hall/CRC
€230.27
Article not available at the moment
Content
Introduction. Instruction cache prefetching. Branch prediction. Trace caches. Branch predication. Multipath execution. Data cache prefetching. Address prediction. Data speculation. Instruction precomputation: Dynamically removing redundant computations using profiling. Profile-Based speculation. Compilation and speculation. Multithreading and speculation. Exploiting Load/Store parallelism via memory dependence prediction. Resource flow microarchitectures.
