Computer Organization and Design

ForewordPrefaceThe SPIM Simulator for the MIPS R2000/R3000Chapters 1 Computer Abstractions and Technology 1.1 Introduction 1.2 Below your Program 1.3 Under the Covers 1.4 Integrated Circuits: Fueling Innovation 1.5 Fallacies and Pitfalls 1.6 Concluding Remarks 1.7 Historical Perspective and Further Reading 1.8 Exercises2 The Role of Performance 2.1 Introduction 2.2 Measuring Performance 2.3 Relating the Metrics 2.4 Popular Performance Metrics 2.5 Choosing Programs to Evaluate Performance 2.6 Comparing and Summarizing Performance 2.7 Fallacies and Pitfalls 2.8 Concluding Remarks 2.9 Historical Perspective and Further Reading 2.10 Exercises3 Instructions: Language of the Machine 3.1 Introduction 3.2 Operations of the Computer Hardware 3.3 Operands of the Computer Hardware 3.4 Representing Instructions in the Computer 3.5 Instructions for Making Decisions 3.6 Supporting Procedures in Computer Hardware 3.7 Other Styles of MIPS Addressing 3.8 Alternatives to the MIPS Approach 3.9 An Example to Put it All Together 3.10 A Longer Example 3.11 Arrays Versus Pointers 3.12 Fallacies and Pitfalls 3.13 Concluding Remarks 3.14 Historical Perspective and Further Reading 3.15 Exercises4 Arithmetic for Computers 4.1 Introduction 4.2 Negative Numbers 4.3 Addition and Subtraction 4.4 Logical Operations 4.5 Constructing an Arithmetic Logic Unit 4.6 Multiplication 4.7 Division 4.8 Floating Point 4.9 Fallacies and Pitfalls 4.10 Concluding Remarks 4.11 Historical Perspective and Further Reading 4.12 Exercises5 The Processor: Datapath and Control 5.1 Introduction 5.2 Building a Datapath 5.3 A Simple Implementation Scheme 5.4 A Multiple Clock Cycle Implementation 5.5 Microprogramming: Simplifying Control Design 5.6 Exceptions 5.7 Fallacies and Pitfalls 5.8 Concluding Remarks 5.9 Historical Perspective and Further Reading 5.10 Exercises6 Enhancing Performance with Pipelining 6.1 Introduction 6.2 A Pipelined Datapath 6.3 Pipelined Control 6.4 Data Hazards 6.5 Control for Data Hazards: Stalls 6.6 Reducing Data Hazards: Forwarding 6.7 Branch Hazards 6.8 Exceptions 6.9 Performance of Pipelined Systems 6.10 Fallacies and Pitfalls 6.11 Concluding Remarks 6.12 Historical Perspective and Further Reading 6.13 Exercises7 Large and Fast: Exploiting Memory Hierarchy 7.1 Introduction 7.2 Caches 7.3 Virtual Memory 7.4 A Common Framework for Memory Hierarchies 7.5 Fallacies and Pitfalls 7.6 Concluding Remarks 7.7 Historical Perspective and Further Reading 7.8 Exercises8 Interfacing Processors and Peripherals 8.1 Introduction 8.2 I/O Performance Measures: Some Examples from Disk and File Systems 8.3 Types and Characteristics of I/O Devices 8.4 Buses: Connecting I/O Devices to Processor and Memory 8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System 8.6 Fallacies and Pitfalls 8.7 Concluding Remarks 8.8 Historical Perspective and Further Reading 8.9 Exercises9 Parallel Processors 9.1 Introduction 9.2 SIMD Computers-Single Instruction Stream, Multiple Data Streams 9.3 MIMD Computers-Multiple Instruction Streams, Multiple Data Streams 9.4 Programming MIMDs 9.5 MIMDs Connected by a Single Bus 9.6 MIMDs Connected by a Network 9.7 Future Directions for Parallel Processors 9.8 Fallacies and Pitfalls 9.9 Concluding Remarks-Evolution Versus Revolution in Computer Architecture 9.10 Historical Perspective and Further Reading 9.11 ExercisesAppendicesA Assemblers, Linkers, and the SPIM Simulator A.1 Introduction A.2 Assemblers A.3 Linkers A.4 Loading A.5 Memory Usage A.6 Procedure Call Convention A.7 Exceptions and Interrupts A.