Microcomputer Busses
Published on 2. December 2012
256 pages
978-0-323-15887-9 (ISBN)
Description
Microcomputer Busses provides the necessary introduction to the basic features and capabilities of a range of popular commercial busses. Its main objective is to prepare students in solving engineering problems using the concepts and materials featured in the book. The first three chapters introduce the basic concepts and principles such as basic bus and transmission-line concepts, comparative analysis of busses, and the process of how a program can give out hardware responses or operations on a bus. The middle section of the book delves more deeply into the different types of computer busses and into the important features of the operation of each bus. The book supplements and simplifies these features. Lastly, the book concludes by illustrating design examples of existing sample boards that are produced commercially. This book serves as a valuable tool to engineering students. Systems engineers and design engineers can also use this book as reference in designing microcomputer-based systems or in developing system architecture.
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R.M. Cram
Microcomputer Busses
Book
09/1991
Academic Press
€62.00
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Content
Preface1 Basic Bus Concepts 1.0 Bus Background 1.1 Bus Definition 1.2 Design Trade-off Assessment Factors 1.3 Signal Groups and Uses 1.4 Transmission-Line Concepts2 A Comparison of Busses 2.0 Limitations 2.1 A Basis for Comparison 2.2 Which Busses 2.3 Bus Comparison3 Software/Hardware Interactions 3.0 What and Why, or "A Touch of Philosophy" 3.1 The Big Picture 3.2 Bus Interaction4 Multibus I 4.0 Multibus I Overview 4.1 iSBX Bus 4.2 iLBX Bus 4.3 Multichannel I/O Bus 4.4 Multibus System Bus 4.5 Multibus Data Transfers 4.6 Multiple Masters 4.7 Interrupts5 Multibus II 5.0 Multibus II Overview 5.1 Basic Features and Capabilities of Multibus II 5.2 Multibus II Mechanical Specifications 5.3 Multibus II Operations 5.4 Multibus II Line Descriptions 5.5 Timing Requirements for Bus Operations 5.6 Electrical Specifications6 VMEbus 6.0 VMEbus Overview 6.1 Basic Features and Capabilities of the VMEbus 6.2 VMEbus Mechanical Specifications 6.3 VMEbus Cycles 6.4 VME Functional Modules 6.5 Data Transfer Bus 6.6 Data Transfer Arbitration Bus 6.7 Priority Interrupt Bus7 NuBus 7.0 NuBus Overview 7.1 NuBus Mechanical Specifications 7.2 Bus Lines 7.3 Types of Bus Cycles and Transactions 7.4 Bus Arbitration 7.5 Geographic Addressing 7.6 Utility Functions 7.7 NuBus Electrical Characteristics8 PC/XT/AT Bus 8.0 PC/XT/AT Bus Overview 8.1 Basic Features and Capabilities of PC Busses 8.2 PC Bus Mechanical Specifications 8.3 Bus Lines 8.4 PC, XT, and AT Bus Cycles9 STD Bus 9.0 STD Bus Overview 9.1 STD Bus Mechanical Outline 9.2 STD Bus Signal Lines 9.3 Data Transfer Operations 9.4 Signal Voltage Tolerances10 Programmable Logic Devices 10.0 Programmable Logic Devices Overview 10.1 Boolean Equation Review 10.2 State Machine Review 10.3 PLD Architecture 10.4 Programming Programmable Logic Devices 10.5 Metastability 10.6 Programming Examples11 Field-Programmable Gate Arrays 11.0 Field-Programmable Gate Arrays Overview 11.1 FPGA Speed Considerations 11.2 FPGA Architecture 11.3 Configuration 11.4 FPGA Development Process 11.5 Future Trends12 Multibus I Design Example 12.0 Summary 12.1 Multibus Digital-to-Analog Converter Board13 VMEbus Design Example 13.0 Summary 13.1 VMEbus Memory BoardIndex
