Principles of VLSI RTL Design
A Practical Guide
1st Edition
Published on 4. May 2011
XV, 182 pages
978-1-4419-9296-3 (ISBN)
Description
Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written. Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.
More details
Series
Language
English
Place of publication
New York
United States
Publishing group
Springer US
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
XV, 182 p.
File size
7,91 MB
ISBN-13
978-1-4419-9296-3 (9781441992963)
DOI
10.1007/978-1-4419-9296-3
Schweitzer Classification
Other editions
Additional editions
Book
10/2014
Springer
€96.29
Shipment within 15-20 days
Book
05/2011
1st Edition
Springer
€139.09
Shipment within 15-20 days
Content
Introduction to RTL Designs; Ensuring RTL Intent; Static Timing Analysis (STA); Clock Domain Crossing (CDC); Power; Design for Test; Timing Exceptions; Congestion; Conclusions.
