Closing the Power Gap between ASIC & Custom
Tools and Techniques for Low Power Design
1st Edition
Published on 23. January 2008
XII, 388 pages
978-0-387-68953-1 (ISBN)
Description
This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.
Important topics include:- Microarchitectural techniques to reduce energy per operation- Power reduction with timing slack from pipelining- Analysis of the benefits of using multiple supply and threshold voltages- Placement techniques for multiple supply voltages- Verification for multiple voltage domains- Improved algorithms for gate sizing, and assignment of supply and threshold voltages- Power gating design automation to reduce leakage- Relationships among tatistical timing, power analysis, and parametric yield optimization
Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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David Chinnery | Kurt Keutzer
Closing the Power Gap between ASIC & Custom
Tools and Techniques for Low Power Design
Book
09/2007
Springer
€160.49
Shipment within 5-7 days
Content
Overview of the Factors Affecting the Power Consumption.- Pipelining to Reduce the Power.- Voltage Scaling.- Methodology to Optimize Energy of Computation for SOCs.- Linear Programming for Gate Sizing.- Linear Programming for Multi-Vth and Multi-Vdd Assignment.- Power Optimization using Multiple Supply Voltages.- Placement for Power Optimization.- Power Gating Design Automation.- Verification For Multiple Supply Voltage Designs.- Winning the Power Struggle in an Uncertain Era.- Pushing ASIC Performance in a Power Envelope.- Low Power ARM 1136JF-S Design.
