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Fundamentals of Analog-to-Digital Data Converters (ADCs)

Sensors are devices which convert physical phenomena (sound, light, temperature, and others) into another signal, usually an electrical one. There are hundreds of applications for sensors in measurements and instrumentation, biomedical and environmental applications, Internet of Things (IoT), image sensors, and many more. In most cases, the electric output of the sensor is transmitted to a computer through an analog interface. This interface (often called analog front-end or AFE) may be used to amplify the sensor's output signal and to filter out unwanted noise from it. In most cases, it is followed by an analog-to-digital data converter (ADC) used to convert the AFE output into a digital form suitable for digital signal processing by a follow-up computer. The detailed structure of the AFE depends on the properties of the sensor output signal and on the application of the sensor. Figure 1.1 illustrates the block diagram of a sensor and its AFE. In this chapter, the fundamental principles of ADC are discussed, and an introduction to some high-accuracy data converters will be given.

1.1 Performance Parameters for Analog-to-Digital Converters

The ADC is often the most complex and critical part of the signal chain. Its specifications, as for those of the AFE, may vary widely, depending on the sensor signal and on the application of the device. Figure 1.2 illustrates the operation of an ADC. The input is an analog signal Vin, while the digital output Dout is a sequence of numbers which is the digital representation of Vin. The input-output relation is

Here, Vref is the reference voltage of the converter, and Vq is the quantization error. The quantization error cannot be avoided, since Vin may take on any value within its range, while the digital signal is the sum of its bits (binary-weighted digits), and hence, it can only assume a finite number of values. The symbol of the ADC is shown in Figure 1.2, along with a simple model based on Eq. (1.1).

Figure 1.1 Analog front-end for sensor interface.

Figure 1.2 (a) The symbol of an ADC; (b) a simple ADC model.

Figure 1.3 illustrates the normalized input-output characteristics of two M-level ADCs. Vref = 1 V is assumed. Both ADCs are bipolar, i.e. able to convert both positive and negative inputs. Both have M steps and M + 1 levels. The resolution of an M-step converter in bits is given by N = log2 (M + 1). The 45° line k · y shows the accurate output values which an infinite resolution ADC would provide for Vref = 1 V. The least significant bit value in the figure is VLSB = ? = 2. The figure shows that in a range of the input range -(M + 1) <y < (M + 1), the magnitude of quantization error e = v - y satisfies |e| <?/2 = 1. This is the linear input range of the ADC.

Figure 1.3 Normalized analog-to-digital converter transfer and error curves for a bipolar M-step ADC: (a) symbol; (b) curves for a mid-rise ADC; and (c) curves for a mid-tread ADC. The least significant bit value is VLSB = ? = 2, and the slope is k = 1/Vref = 1.

The difference between the two ADCs shown in Figure 1.3 lies in the location of the origin on the curves. For the mid-rise quantizer, it lies at a transition point; for the mid-tread converter, it lies in the middle of a flat portion (tread) of the curve. This difference may make the choice between the two options often obvious. The mid-tread ADC is less sensitive to noise, which is often an important advantage. However, if the ADC is used as a quantizer in a feedback loop (as is the case for a delta-sigma or incremental ADC), for very small input signals the mid-tread converter will not be able to change its output from zero, and an undesirable "dead zone" is created in the over-all transfer function.

Clearly, the conversion error Vq = y - v is a causal variable, which can be found exactly from the ADC characteristic and the analog input in every clock period by analysis or simulation. However, to get a fast estimate of the expected performance, often we are treating the error as a random white noise with a zero mean. Its assumed mean square value can be derived by presuming that the probability of the error values outside the range -VLSB/2 <Vq < VLSB/2 is zero, and within that range it has a constant value. These approximations will be valid if the analog input of the quantizer varies sufficiently rapidly, so that the output code changes in almost every clock period. Under these conditions, the mean square value of Vq is given by

The mean square value of Vin of a full-scale sine-wave signal is , and therefore, the signal-to-quantization-noise ratio (SQNR) is

In addition to the SQNR, there are several parameters which can be used to characterize the performance of an ADC. These include its zero error and gain error. The zero error is the error of the first transition voltage in the input-output characteristic of the ADC. The gain error is the error of the difference between the first and last transition voltages.

Other ADC performance parameters are the differential and integral nonlinearities (DNL and INL). The DNL is the largest error in the analog step size which can generate a transition in the digital output. Its ideal value is VLSB. The INL is the largest deviation of the characteristics from a straight line drawn from the lowest to the highest value of the characteristics. Notice that in finding the INL and DNL, we disregard the zero and gain errors.

A key performance parameter is the signal-to-noise plus distortion ratio (SNDR). It is the ratio of the signal power to the total noise-plus-distortion power. It can be found from

Here, ss2, sn2, and sd2 are the mean square values of the signal, the noise, and the harmonic distortion, respectively. The total mean square error is thus a combination of the errors due to the quantization, the noise, and the nonlinear effects.

The resolution of the converter is the number of bits in its output. As shown in Eq. (1.3), it determines the SQNR of the ADC under ideal conditions. An artificially defined quantity, the effective number of bits (ENOB) is often used to characterize the performance of the nonideal ADC. The ENOB is the resolution (number of bits) of a fictitious converter, which has the same SNDR as the actual one but is subject only to quantization error. It can be obtained from Eq. (1.3) as ENOB = (SNDR - 1.76)/6.02.

Yet another important characteristic of the ADC is its spurious free dynamic range (SFDR). For a sine-wave input signal, the output spectrum of the ADC will contain a spectral line at the input frequency, and also other spurious lines caused by harmonic distortion, intermodulation, and other nonlinear effects. The difference between the signal and the largest spurious line, expressed in dB, is its SFDR.

1.2 Algorithms and Architectures for Analog-to-Digital Converters

There are many methods for performing ADC, each suited for a different application. ADCs can be divided into memoryless or Nyquist-rate converters and memoried or oversampled ADCs. The key feature of a memoryless converter is that it performs the conversion of each analog sample individually, independent of past inputs. Thus, it is a one-to-one conversion. In a memoried ADC, the nth digital output D(n) depends on the history of all analog inputs from the first (power-up) input Vin(0) to the current one Vin(n). Note that the "Nyquist-rate" converter cannot in fact sample the analog input at the true Nyquist rate fN (which is defined as twice the signal bandwidth [BW]) without introducing aliasing. This is due to the imperfect antialiasing filter. Hence, the input sampling is often performed at two to four times the Nyquist rate. The oversampled converters may sample the input at a sampling rate fs, which may be many times (hundreds of times) faster than...