Communication, Devices, and Computing
Proceedings of ICCDC 2017
Published on 7. April 2018
XIX, 315 pages
978-981-10-8585-7 (ISBN)
Description
This book provides insights into the First International Conference on Communication, Devices and Computing (ICCDC 2017), which was held in Haldia, India on November 2-3, 2017. It covers new ideas, applications and the experiences of research engineers, scientists, industrialists, scholars and students from around the globe. The proceedings highlight cutting-edge research on communication, electronic devices and computing, and address diverse areas such as 5G communication, spread spectrum systems, wireless sensor networks, signal processing for secure communication, error control coding, printed antennas, analysis of wireless networks, antenna array systems, analog and digital signal processing for communication systems, frequency selective surfaces, radar communication, and substrate integrated waveguide and microwave passive components, which are key to state-of-the-art innovations in communication technologies.
More details
Series
Edition
1st ed. 2017
Language
English
Place of publication
Singapore
Singapore
Publishing group
Springer Singapore
Target group
Professional and scholarly
Product notice
Reflowable
Illustrations
XIX, 315 p. 199 illus., 177 illus. in color.
File size
11,43 MB
ISBN-13
978-981-10-8585-7 (9789811085857)
DOI
10.1007/978-981-10-8585-7
Schweitzer Classification
Other editions
Additional editions
Jaydeb Bhaumik | Indrajit Chakrabarti | Bishnu Prasad De
Communication, Devices, and Computing
Proceedings of ICCDC 2017
Book
04/2018
Springer
€213.99
Shipment within 15-20 days
Persons
Indrajit Chakrabarti , Ph.D., is a Professor at the Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, India. Dr. Chakrabarti holds 2 patents and has published 1 book, 33 journal papers, and 73 conference papers. His primary research interest is in VLSI Design.
Jaydeb Bhaumik is a Professor at the Department of Electronics and Communication Engineering, Haldia Institute of Technology, Haldia, West Bengal, India. Dr. Bhaumik received his Ph.D. from the IIT Kharagpur in 2010. Dr. Bhaumik has 2 books, 19 journal papers, 25 conference papers and 1 technical report to his credit. He has 10 years of teaching and over 4 years of research experience. His areas of interest include VLSI architectures for cryptographic algorithms and error correcting codes, security issues in image processing, lightweight block ciphers, and cellular automata.
Dr. Bishnu Prasad De is an Assistant Professorat the Department of Electronics and Communication Engineering, Haldia Institute of Technology, West Bengal, India. Dr. De has 7 years of teaching and 2 years of research experience. His areas of interest include VLSI circuits & systems, analog electronics, electronic design automation, and soft computing. He has published several papers in journals of national and international repute.
Mr. Banibrata Bag is an Assistant Professor at the Department of Electronics and Communication Engineering, Haldia Institute of Technology, West Bengal, India. He has 6 years of teaching and 4 years of industry experience. His main area of research is optical wireless communications and networks. He has published 1 book, 5 journal papers, and 9 conference papers.
Mr. Surajit Mukherjee is an Assistant Professor at the Department of Electronics and Communication Engineering, Haldia Institute of Technology, West Bengal, India. He has 7 years of teaching experience, and has published 6 journal papers and 4 conference papers. His areas of research include antenna design, microwave filter design, and frequency selective surfaces.
Content
1 - Preface [Seite 6]
2 - Committee [Seite 8]
2.1 - Patron [Seite 8]
2.2 - Joint Organizing Secretary [Seite 8]
2.3 - Joint Convener [Seite 8]
2.4 - Program Committee Members [Seite 8]
2.5 - Technical Program Committee Members [Seite 9]
2.6 - Additional Reviewers [Seite 11]
2.7 - Advisory Committee [Seite 11]
2.8 - Organizing Committee [Seite 11]
3 - Contents [Seite 13]
4 - Message from the Volume Editors It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2-3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. [Seite 16]
5 - It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2-3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. [Seite 16]
6 - About the Editors [Seite 17]
7 - Binary Error Correcting Code for DNA Databank [Seite 18]
7.1 - 1 Introduction [Seite 18]
7.2 - 2 DNA Databank or DNA Database [Seite 22]
7.2.1 - 2.1 Types of DNA Databases [Seite 22]
7.3 - 3 Importance of DNA Databank [Seite 23]
7.4 - 4 Binary ECC Code for DNA Sequences [Seite 24]
7.4.1 - 4.1 Proposed SEC Encoding Steps [Seite 24]
7.4.2 - 4.2 Proposed SEC Decoding Steps [Seite 25]
7.4.3 - 4.3 Reviriego et al. SEC (280, 256) Code for Any Arbitrary DNA Sequence [Seite 26]
7.5 - 5 Conclusion [Seite 28]
7.6 - References [Seite 28]
8 - Proactive and Reactive DF Relaying for Energy Harvesting Underlay CR Network [Seite 30]
8.1 - 1 Introduction [Seite 30]
8.2 - 2 System Architecture [Seite 32]
8.2.1 - 2.1 Network Model [Seite 32]
8.2.2 - 2.2 Relay Selection Schemes [Seite 34]
8.3 - 3 Simulation Model [Seite 35]
8.4 - 4 Results and Discussions [Seite 36]
8.5 - 5 Conclusion [Seite 39]
8.6 - References [Seite 39]
9 - Butler Matrix Fed Exponentially Tapered H-Plane Horn Antenna Array System Using Substrate Integrated Folded Waveguide Technology [Seite 41]
9.1 - 1 Introduction [Seite 41]
9.1.1 - 1.1 Butler Matrix Array [Seite 42]
9.1.2 - 1.2 Substrate Integrated Waveguide and Substrate Integrated Folded Waveguide [Seite 44]
9.2 - 2 Design of SIFW H-Plane Exponentially Tapered Horn Antenna [Seite 45]
9.3 - 3 Design of SIFW M-BFAS Using Exponentially Tapered H-Plane Horn Antenna [Seite 48]
9.4 - 4 Conclusion [Seite 52]
9.5 - References [Seite 52]
10 - Computing Characteristic Impedance of MIM Nano Surface Plasmon Structure from Propagation Vector Characteristics for Skin Depth Measurement [Seite 54]
10.1 - 1 Introduction [Seite 54]
10.2 - 2 Mathematical Modeling [Seite 55]
10.3 - 3 Results and Discussions [Seite 57]
10.4 - 4 Conclusion [Seite 61]
10.5 - References [Seite 61]
11 - Extended Directional IPVO for Reversible Data Hiding Scheme [Seite 62]
11.1 - 1 Introduction [Seite 62]
11.2 - 2 Proposed Method [Seite 63]
11.2.1 - 2.1 Data Embedding Procedure [Seite 64]
11.2.2 - 2.2 Minimum Modification-Based Data Embedding [Seite 65]
11.2.3 - 2.3 Maximum Modification-Based Data Embedding [Seite 66]
11.2.4 - 2.4 Data Extraction Procedure [Seite 67]
11.2.5 - 2.5 Minimum Modification-Based Data Extraction [Seite 68]
11.2.6 - 2.6 Maximum Modification-Based Data Extraction [Seite 68]
11.3 - 3 Experimental Result [Seite 69]
11.4 - 4 Conclusion [Seite 72]
11.5 - References [Seite 72]
12 - Hamming Code-Based Watermarking Scheme for Image Authentication and Tampered Detection [Seite 74]
12.1 - 1 Introduction [Seite 74]
12.2 - 2 Proposed Watermarking Scheme [Seite 76]
12.2.1 - 2.1 Watermark Embedding [Seite 76]
12.2.2 - 2.2 Watermark Extraction [Seite 76]
12.3 - 3 Experiment and Comparison [Seite 78]
12.4 - 4 Steganalysis [Seite 80]
12.5 - 5 Attacks [Seite 80]
12.6 - 6 Conclusion [Seite 81]
12.7 - References [Seite 82]
13 - RS (255, 249) Codec Based on All Primitive Polynomials Over GF(28) [Seite 83]
13.1 - 1 Introduction [Seite 84]
13.2 - 2 M-ary Phase-Shift Keying (MPSK) Modulation Technique [Seite 85]
13.3 - 3 Primitive Polynomials in GF(28) Field [Seite 86]
13.4 - 4 Design of RS (255, 249) Encoder and Decoder Block [Seite 86]
13.4.1 - 4.1 RS (255, 249) Encoder Block [Seite 86]
13.4.2 - 4.2 RS (255, 249) Decoder Block [Seite 88]
13.5 - 5 Theoretical Complexity of RS (255, 249) Encoder and Decoder [Seite 90]
13.6 - 6 Synthesis Results [Seite 90]
13.7 - 7 Conclusion [Seite 94]
13.8 - References [Seite 94]
14 - Secure User Authentication System Using Image-Based OTP and Randomize Numeric OTP Based on User Unique Biometric Image and Digit Repositioning Scheme [Seite 96]
14.1 - 1 Introduction [Seite 97]
14.2 - 2 Background Study [Seite 97]
14.3 - 3 Preliminaries [Seite 97]
14.3.1 - 3.1 BWMAS Operation (Bit-wise Masking and Alternate Sequence) [Seite 97]
14.4 - 4 Overall Procedure [Seite 98]
14.5 - 5 Formation of OTP at Authentication Server End [Seite 98]
14.5.1 - 5.1 Algorithm for Generation and Encryption of Image OTP [Seite 99]
14.5.2 - 5.2 Algorithm for Generating Numeric OTP [Seite 99]
14.5.3 - 5.3 Algorithm for Digit Repositioning Schemes [Seite 99]
14.6 - 6 Distribution of Image-Based OTP and Numeric OTP [Seite 100]
14.7 - 7 Extraction of OTP at User End and Authentication [Seite 100]
14.8 - 8 Results and Comparisons [Seite 100]
14.8.1 - 8.1 Inputs at User Registration Time to Authentication System [Seite 100]
14.8.2 - 8.2 Formation of Image-Based OTP at Server End [Seite 101]
14.8.3 - 8.3 Generation of First-Level Numeric OTP [Seite 101]
14.8.4 - 8.4 Generation of Biometric Image-Based Second-Level Numeric OTP [Seite 102]
14.8.5 - 8.5 Intermediate OTP Generated After Alternate Merge Between Two OTPs [Seite 102]
14.8.6 - 8.6 Generation of Final OTP [Seite 102]
14.8.7 - 8.7 Distribution of Encrypted Image OTP and Intermediate Numeric OTP Through User Email and Message [Seite 103]
14.8.8 - 8.8 Extraction of Image OTP and Numeric OTP at User End [Seite 103]
14.8.9 - 8.9 User Authentication [Seite 104]
14.9 - 9 Comparison of Existing OTP Systems and Security Analysis [Seite 104]
14.10 - 10 Conclusions [Seite 106]
14.11 - References [Seite 106]
15 - Application of RCGA in Optimization of Return Loss of a Monopole Antenna with Sierpinski Fractal Geometry [Seite 107]
15.1 - 1 Introduction [Seite 107]
15.2 - 2 Antenna Design [Seite 108]
15.3 - 3 Genetic Algorithm [Seite 109]
15.4 - 4 Application of GA in Antenna Design [Seite 109]
15.5 - 5 Results and Discussion [Seite 111]
15.6 - 6 Conclusion [Seite 113]
15.7 - References [Seite 114]
16 - Improvement of Radiation Performances of Butler Matrix-Fed Antenna Array System Using 4 × 1 Planar Circular EBG Units [Seite 115]
16.1 - 1 Introduction [Seite 115]
16.1.1 - 1.1 Butler Matrix Array [Seite 116]
16.1.2 - 1.2 Electromagnetic Band Gap Structure [Seite 118]
16.2 - 2 Design of 4 × 1 Planar Circular EBG Unit [Seite 118]
16.3 - 3 Design of Butler Matrix-Fed Antenna Array System Incorporated with 4 × 1 EBG Units [Seite 119]
16.4 - 4 Conclusion [Seite 124]
16.5 - References [Seite 124]
17 - Improving Security of SPN-Type Block Cipher Against Fault Attack [Seite 126]
17.1 - 1 Introduction [Seite 126]
17.2 - 2 Description of SPN-Type Block Cipher Algorithm [Seite 127]
17.3 - 3 Fault Attack on Ninth Round of the Proposed SPN-Type Architecture [Seite 129]
17.3.1 - 3.1 A Working Example [Seite 134]
17.3.2 - 3.2 Comparison with Existing Works [Seite 135]
17.4 - 4 Conclusion [Seite 136]
17.5 - References [Seite 137]
18 - High-Capacity Reversible Data Hiding Scheme Using Dual Color Image Through (7, 4) Hamming Code [Seite 138]
18.1 - 1 Introduction [Seite 138]
18.2 - 2 Proposed Method [Seite 140]
18.2.1 - 2.1 Numerical Illustration [Seite 141]
18.3 - 3 Experimental Result and Comparison [Seite 146]
18.4 - 4 Security Analysis [Seite 148]
18.5 - 5 Conclusion [Seite 149]
18.6 - References [Seite 149]
19 - A Study on the Effect of a Rectangular Slot on Miniaturization of Microstrip Patch Antenna [Seite 151]
19.1 - 1 Introduction [Seite 151]
19.2 - 2 Antenna Design [Seite 152]
19.3 - 3 Equivalent Circuits [Seite 153]
19.4 - 4 Results and Discussion [Seite 155]
19.5 - 5 Conclusion [Seite 158]
19.6 - References [Seite 159]
20 - FPGA Implementation of OLS (32, 16) Code and OLS (36, 20) Code [Seite 161]
20.1 - 1 Introduction [Seite 162]
20.2 - 2 Orthogonal Latin Square Codes [Seite 163]
20.2.1 - 2.1 Construction of the Parity Check Matrix [Seite 164]
20.3 - 3 Design of OLS Codec [Seite 167]
20.4 - 4 VLSI Implementation [Seite 169]
20.5 - 5 Conclusion [Seite 170]
20.6 - References [Seite 170]
21 - Comparative Study of Wavelets for Image Compression with Embedded Zerotree Algorithm [Seite 172]
21.1 - 1 Introduction [Seite 172]
21.2 - 2 Discrete Wavelet Transform in Image Compression [Seite 173]
21.3 - 3 Wavelets and Their Properties [Seite 174]
21.4 - 4 Image Compression Using EZW Algorithm [Seite 174]
21.5 - 5 Experiment and Results [Seite 175]
21.6 - 6 Conclusion [Seite 179]
21.7 - 7 Future Work [Seite 180]
21.8 - References [Seite 180]
22 - Design of Compact Wideband Folded Substrate-Integrated Waveguide Band-Pass Filter for X-band Applications [Seite 181]
22.1 - 1 Introduction [Seite 181]
22.2 - 2 Design of Substrate-Integrated Waveguide (SIW) [Seite 182]
22.2.1 - 2.1 SIW Design Formulas [Seite 183]
22.3 - 3 Design of Folded Substrate-Integrated Waveguide (FSIW) [Seite 183]
22.3.1 - 3.1 Design and Analysis of FSIW (with C Slot on Central Metal Septum of FSIW) [Seite 185]
22.3.2 - 3.2 Design and Analysis of FSIW (with E Slot on Central Metal Septum of FSIW) [Seite 186]
22.4 - 4 Results and Conclusion [Seite 187]
22.5 - References [Seite 188]
23 - DCT-Based Gray Image Watermarking Scheme [Seite 189]
23.1 - 1 Introduction [Seite 189]
23.2 - 2 Proposed Scheme [Seite 190]
23.2.1 - 2.1 Pseudorandom Non-repeated Position Generator [Seite 191]
23.2.2 - 2.2 Discrete Cosine Transform (DCT) [Seite 192]
23.2.3 - 2.3 Embedding Watermark [Seite 192]
23.2.4 - 2.4 Extraction of Watermark [Seite 193]
23.3 - 3 Experimental Results [Seite 193]
23.4 - 4 Performance Evaluation [Seite 193]
23.4.1 - 4.1 Imperceptibility [Seite 194]
23.4.2 - 4.2 Robustness [Seite 194]
23.4.3 - 4.3 Error Probability [Seite 195]
23.4.4 - 4.4 Comparative Study [Seite 195]
23.4.5 - 4.5 Attack and Analysis [Seite 195]
23.5 - 5 Conclusions [Seite 197]
23.6 - References [Seite 197]
24 - Five-Input Majority Gate Design with Single Electron Nano-Device [Seite 198]
24.1 - 1 Introduction [Seite 198]
24.1.1 - 1.1 Single Electron Device [Seite 199]
24.2 - 2 Five-Input Majority Gate Implementation [Seite 199]
24.3 - 3 Simulation Results of Five-Input Majority Gate [Seite 201]
24.4 - 4 Conclusion [Seite 202]
24.5 - References [Seite 203]
25 - Post-layout Power Supply Noise Suppression and Performance Analysis of Multi-core Processor Using 90 nm Process Technology [Seite 205]
25.1 - 1 Introduction [Seite 205]
25.2 - 2 Power Distribution Network and Supply Noise [Seite 206]
25.2.1 - 2.1 Ldi(t)/dt Noise [Seite 206]
25.2.2 - 2.2 IR Noise [Seite 206]
25.3 - 3 Budget for Decoupling Capacitance [Seite 207]
25.4 - 4 CAD Methodology [Seite 208]
25.5 - 5 Simulation Results and Analysis [Seite 209]
25.6 - 6 Conclusion and Future Scope [Seite 210]
25.7 - References [Seite 210]
26 - Enhanced Performance of GaN/InGaN Multiple Quantum Well LEDs by Shallow First Well and Stepped Electron-Blocking Layer [Seite 212]
26.1 - 1 Introduction [Seite 213]
26.2 - 2 Device Structure [Seite 213]
26.3 - 3 Simulation Framework [Seite 214]
26.4 - 4 Results and Discussion [Seite 215]
26.5 - 5 Conclusion [Seite 219]
26.6 - References [Seite 219]
27 - A µ-Controller-Based Biomedical Device to Measure EMG Strength from Human Muscle [Seite 221]
27.1 - 1 Introduction [Seite 221]
27.2 - 2 System Description [Seite 222]
27.2.1 - 2.1 EMG Sensors [Seite 222]
27.2.2 - 2.2 Signal Processing Circuitry [Seite 222]
27.2.3 - 2.3 Embedded Circuit Board [Seite 224]
27.3 - 3 System Operation [Seite 226]
27.4 - 4 Calculation [Seite 228]
27.5 - 5 Flow Chart Diagram [Seite 229]
27.6 - 6 Result and Discussion [Seite 230]
27.7 - References [Seite 230]
28 - Design and Implementation of a DCM Flyback Converter with Self-biased and Over-Current Protection Circuit [Seite 232]
28.1 - 1 Introduction [Seite 232]
28.2 - 2 Operation of Flyback Converter [Seite 235]
28.2.1 - 2.1 Operation During on Period of Switch [Seite 235]
28.2.2 - 2.2 Operation During off Period of Switch [Seite 237]
28.3 - 3 Design of Flyback Converter [Seite 237]
28.3.1 - 3.1 Input [Seite 238]
28.3.2 - 3.2 Buck Converter [Seite 238]
28.3.3 - 3.3 Snubber Circuit [Seite 239]
28.3.4 - 3.4 Feedback Isolation [Seite 239]
28.3.5 - 3.5 Control Section [Seite 239]
28.3.6 - 3.6 Output Section [Seite 239]
28.4 - 4 Result and Discussion [Seite 240]
28.5 - 5 Conclusion [Seite 242]
28.6 - References [Seite 242]
29 - Performance Improvement of Light-Emitting Diodes with W-Shaped InGaN/GaN Multiple Quantum Wells [Seite 243]
29.1 - 1 Introduction [Seite 243]
29.2 - 2 Device Structure and Simulation Framework [Seite 244]
29.3 - 3 Results and Discussion [Seite 246]
29.4 - 4 Conclusion [Seite 251]
29.5 - References [Seite 252]
30 - Behavioral Modeling of Differential Inductive Seismic Sensor and Implementation of Its Readout Circuit [Seite 254]
30.1 - 1 Introduction [Seite 254]
30.2 - 2 Behavioral Modeling of Differential Inductive Seismic Sensor [Seite 255]
30.2.1 - 2.1 Structure and Working Principle [Seite 255]
30.2.2 - 2.2 Mathematical Foundation [Seite 256]
30.3 - 3 Readout Circuit Design and Implementation [Seite 259]
30.4 - 4 Results and Discussion [Seite 260]
30.5 - 5 Conclusion [Seite 262]
30.6 - References [Seite 262]
31 - Application of PSO Variants for Optimal Design of Two-Stage CMOS Op-amp with Robust Bias Circuit [Seite 264]
31.1 - 1 Introduction [Seite 264]
31.2 - 2 Specifications for Design and Formulation of Cost Function [Seite 265]
31.3 - 3 Evolutionary Algorithms Used [Seite 266]
31.4 - 4 Discussions of Simulation Results [Seite 267]
31.5 - 5 Conclusions [Seite 273]
31.6 - References [Seite 273]
32 - Representation and Exploring the Semantic Organization of Bangla Word in the Mental Lexicon: Evidence from Cross-Modal Priming Experiments and Vector Space Model [Seite 274]
32.1 - 1 Introduction [Seite 274]
32.2 - 2 Related Work [Seite 275]
32.3 - 3 The Priming Experiment 1 [Seite 276]
32.3.1 - 3.1 Materials [Seite 277]
32.3.2 - 3.2 Procedure [Seite 277]
32.3.3 - 3.3 Participants [Seite 278]
32.3.4 - 3.4 Results and Discussion [Seite 278]
32.4 - 4 The Priming Experiment 2 [Seite 279]
32.4.1 - 4.1 Material and Procedure [Seite 279]
32.4.2 - 4.2 Participants [Seite 279]
32.4.3 - 4.3 Results and Discussion [Seite 279]
32.5 - 5 Analyzing the Effect of Semantic Priming Using Computational Model (VSM) [Seite 280]
32.6 - 6 Conclusions [Seite 281]
32.7 - References [Seite 281]
33 - Solving a Solid Transportation Problems Through Fuzzy Ranking [Seite 283]
33.1 - 1 Introduction [Seite 283]
33.2 - 2 Mathematical Model of FSTP [Seite 284]
33.3 - 3 Solution Method [Seite 285]
33.3.1 - 3.1 Algorithm for Proposed Method-1 [Seite 285]
33.3.2 - 3.2 Use of Fuzzy Expectation and GRG: [Seite 288]
33.4 - 4 Numerical Experiments: [Seite 288]
33.4.1 - 4.1 Optimum Results by Method-1: [Seite 288]
33.4.2 - 4.2 Optimum Results by Method-2: [Seite 291]
33.5 - 5 Conclusion [Seite 291]
33.6 - References [Seite 291]
34 - Optimal Design of Low-Noise Three-Stage Op-amp Using PSO Algorithm [Seite 293]
34.1 - 1 Introduction [Seite 293]
34.2 - 2 Optimization Algorithm Employed [Seite 294]
34.3 - 3 Design Specifications for the CMOS TSCOA [Seite 295]
34.4 - 4 Discussions on Simulation Results [Seite 296]
34.5 - 5 Conclusion [Seite 301]
34.6 - References [Seite 301]
35 - Optimal Design of Low-Voltage, Two-Stage CMOS Op-amp Using Evolutionary Techniques [Seite 302]
35.1 - 1 Introduction [Seite 302]
35.2 - 2 Design Specifications and Objective Function Formulation [Seite 303]
35.3 - 3 Evolutionary Algorithm Employed [Seite 306]
35.4 - 4 Simulation Results and Discussions [Seite 307]
35.5 - 5 Conclusions [Seite 309]
35.6 - References [Seite 314]
2 - Committee [Seite 8]
2.1 - Patron [Seite 8]
2.2 - Joint Organizing Secretary [Seite 8]
2.3 - Joint Convener [Seite 8]
2.4 - Program Committee Members [Seite 8]
2.5 - Technical Program Committee Members [Seite 9]
2.6 - Additional Reviewers [Seite 11]
2.7 - Advisory Committee [Seite 11]
2.8 - Organizing Committee [Seite 11]
3 - Contents [Seite 13]
4 - Message from the Volume Editors It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2-3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. [Seite 16]
5 - It is a great pleasure for us to organize the first International Conference on Communication, Devices, and Computing (ICCDC 2017) held during November 2-3, 2017, at the Haldia Institute of Technology, Purba Medinipur, West Bengal, India. Our main goal is to provide an opportunity to the participants to learn about contemporary research in the area of Communication, Devices, and Computing and to exchange ideas among themselves and with experts present in the conference as invited speakers. It is our sincere hope that the conference will help the participants in their research and training. Also will open new avenues of work for those who are either starting their research or looking for extending their area of research in Communication, Devices, and Computing.After an initial call for papers, 62 papers were submitted for presentation at the conference. All submitted papers were sent to external referees, and after refereeing, 29 papers were recommended for publication in the conference proceedings which will be published by Springer in its Lecture Notes on Electrical Engineering (LNEE) series.We are grateful to the speakers, participants, referees, organizers, sponsors, and funding agencies (DRDO, ISRO) for their support and help, without which it would have been impossible to organize this conference. We express our gratitude to the organizing committee members who work behind the scene tirelessly to make this conference successful. [Seite 16]
6 - About the Editors [Seite 17]
7 - Binary Error Correcting Code for DNA Databank [Seite 18]
7.1 - 1 Introduction [Seite 18]
7.2 - 2 DNA Databank or DNA Database [Seite 22]
7.2.1 - 2.1 Types of DNA Databases [Seite 22]
7.3 - 3 Importance of DNA Databank [Seite 23]
7.4 - 4 Binary ECC Code for DNA Sequences [Seite 24]
7.4.1 - 4.1 Proposed SEC Encoding Steps [Seite 24]
7.4.2 - 4.2 Proposed SEC Decoding Steps [Seite 25]
7.4.3 - 4.3 Reviriego et al. SEC (280, 256) Code for Any Arbitrary DNA Sequence [Seite 26]
7.5 - 5 Conclusion [Seite 28]
7.6 - References [Seite 28]
8 - Proactive and Reactive DF Relaying for Energy Harvesting Underlay CR Network [Seite 30]
8.1 - 1 Introduction [Seite 30]
8.2 - 2 System Architecture [Seite 32]
8.2.1 - 2.1 Network Model [Seite 32]
8.2.2 - 2.2 Relay Selection Schemes [Seite 34]
8.3 - 3 Simulation Model [Seite 35]
8.4 - 4 Results and Discussions [Seite 36]
8.5 - 5 Conclusion [Seite 39]
8.6 - References [Seite 39]
9 - Butler Matrix Fed Exponentially Tapered H-Plane Horn Antenna Array System Using Substrate Integrated Folded Waveguide Technology [Seite 41]
9.1 - 1 Introduction [Seite 41]
9.1.1 - 1.1 Butler Matrix Array [Seite 42]
9.1.2 - 1.2 Substrate Integrated Waveguide and Substrate Integrated Folded Waveguide [Seite 44]
9.2 - 2 Design of SIFW H-Plane Exponentially Tapered Horn Antenna [Seite 45]
9.3 - 3 Design of SIFW M-BFAS Using Exponentially Tapered H-Plane Horn Antenna [Seite 48]
9.4 - 4 Conclusion [Seite 52]
9.5 - References [Seite 52]
10 - Computing Characteristic Impedance of MIM Nano Surface Plasmon Structure from Propagation Vector Characteristics for Skin Depth Measurement [Seite 54]
10.1 - 1 Introduction [Seite 54]
10.2 - 2 Mathematical Modeling [Seite 55]
10.3 - 3 Results and Discussions [Seite 57]
10.4 - 4 Conclusion [Seite 61]
10.5 - References [Seite 61]
11 - Extended Directional IPVO for Reversible Data Hiding Scheme [Seite 62]
11.1 - 1 Introduction [Seite 62]
11.2 - 2 Proposed Method [Seite 63]
11.2.1 - 2.1 Data Embedding Procedure [Seite 64]
11.2.2 - 2.2 Minimum Modification-Based Data Embedding [Seite 65]
11.2.3 - 2.3 Maximum Modification-Based Data Embedding [Seite 66]
11.2.4 - 2.4 Data Extraction Procedure [Seite 67]
11.2.5 - 2.5 Minimum Modification-Based Data Extraction [Seite 68]
11.2.6 - 2.6 Maximum Modification-Based Data Extraction [Seite 68]
11.3 - 3 Experimental Result [Seite 69]
11.4 - 4 Conclusion [Seite 72]
11.5 - References [Seite 72]
12 - Hamming Code-Based Watermarking Scheme for Image Authentication and Tampered Detection [Seite 74]
12.1 - 1 Introduction [Seite 74]
12.2 - 2 Proposed Watermarking Scheme [Seite 76]
12.2.1 - 2.1 Watermark Embedding [Seite 76]
12.2.2 - 2.2 Watermark Extraction [Seite 76]
12.3 - 3 Experiment and Comparison [Seite 78]
12.4 - 4 Steganalysis [Seite 80]
12.5 - 5 Attacks [Seite 80]
12.6 - 6 Conclusion [Seite 81]
12.7 - References [Seite 82]
13 - RS (255, 249) Codec Based on All Primitive Polynomials Over GF(28) [Seite 83]
13.1 - 1 Introduction [Seite 84]
13.2 - 2 M-ary Phase-Shift Keying (MPSK) Modulation Technique [Seite 85]
13.3 - 3 Primitive Polynomials in GF(28) Field [Seite 86]
13.4 - 4 Design of RS (255, 249) Encoder and Decoder Block [Seite 86]
13.4.1 - 4.1 RS (255, 249) Encoder Block [Seite 86]
13.4.2 - 4.2 RS (255, 249) Decoder Block [Seite 88]
13.5 - 5 Theoretical Complexity of RS (255, 249) Encoder and Decoder [Seite 90]
13.6 - 6 Synthesis Results [Seite 90]
13.7 - 7 Conclusion [Seite 94]
13.8 - References [Seite 94]
14 - Secure User Authentication System Using Image-Based OTP and Randomize Numeric OTP Based on User Unique Biometric Image and Digit Repositioning Scheme [Seite 96]
14.1 - 1 Introduction [Seite 97]
14.2 - 2 Background Study [Seite 97]
14.3 - 3 Preliminaries [Seite 97]
14.3.1 - 3.1 BWMAS Operation (Bit-wise Masking and Alternate Sequence) [Seite 97]
14.4 - 4 Overall Procedure [Seite 98]
14.5 - 5 Formation of OTP at Authentication Server End [Seite 98]
14.5.1 - 5.1 Algorithm for Generation and Encryption of Image OTP [Seite 99]
14.5.2 - 5.2 Algorithm for Generating Numeric OTP [Seite 99]
14.5.3 - 5.3 Algorithm for Digit Repositioning Schemes [Seite 99]
14.6 - 6 Distribution of Image-Based OTP and Numeric OTP [Seite 100]
14.7 - 7 Extraction of OTP at User End and Authentication [Seite 100]
14.8 - 8 Results and Comparisons [Seite 100]
14.8.1 - 8.1 Inputs at User Registration Time to Authentication System [Seite 100]
14.8.2 - 8.2 Formation of Image-Based OTP at Server End [Seite 101]
14.8.3 - 8.3 Generation of First-Level Numeric OTP [Seite 101]
14.8.4 - 8.4 Generation of Biometric Image-Based Second-Level Numeric OTP [Seite 102]
14.8.5 - 8.5 Intermediate OTP Generated After Alternate Merge Between Two OTPs [Seite 102]
14.8.6 - 8.6 Generation of Final OTP [Seite 102]
14.8.7 - 8.7 Distribution of Encrypted Image OTP and Intermediate Numeric OTP Through User Email and Message [Seite 103]
14.8.8 - 8.8 Extraction of Image OTP and Numeric OTP at User End [Seite 103]
14.8.9 - 8.9 User Authentication [Seite 104]
14.9 - 9 Comparison of Existing OTP Systems and Security Analysis [Seite 104]
14.10 - 10 Conclusions [Seite 106]
14.11 - References [Seite 106]
15 - Application of RCGA in Optimization of Return Loss of a Monopole Antenna with Sierpinski Fractal Geometry [Seite 107]
15.1 - 1 Introduction [Seite 107]
15.2 - 2 Antenna Design [Seite 108]
15.3 - 3 Genetic Algorithm [Seite 109]
15.4 - 4 Application of GA in Antenna Design [Seite 109]
15.5 - 5 Results and Discussion [Seite 111]
15.6 - 6 Conclusion [Seite 113]
15.7 - References [Seite 114]
16 - Improvement of Radiation Performances of Butler Matrix-Fed Antenna Array System Using 4 × 1 Planar Circular EBG Units [Seite 115]
16.1 - 1 Introduction [Seite 115]
16.1.1 - 1.1 Butler Matrix Array [Seite 116]
16.1.2 - 1.2 Electromagnetic Band Gap Structure [Seite 118]
16.2 - 2 Design of 4 × 1 Planar Circular EBG Unit [Seite 118]
16.3 - 3 Design of Butler Matrix-Fed Antenna Array System Incorporated with 4 × 1 EBG Units [Seite 119]
16.4 - 4 Conclusion [Seite 124]
16.5 - References [Seite 124]
17 - Improving Security of SPN-Type Block Cipher Against Fault Attack [Seite 126]
17.1 - 1 Introduction [Seite 126]
17.2 - 2 Description of SPN-Type Block Cipher Algorithm [Seite 127]
17.3 - 3 Fault Attack on Ninth Round of the Proposed SPN-Type Architecture [Seite 129]
17.3.1 - 3.1 A Working Example [Seite 134]
17.3.2 - 3.2 Comparison with Existing Works [Seite 135]
17.4 - 4 Conclusion [Seite 136]
17.5 - References [Seite 137]
18 - High-Capacity Reversible Data Hiding Scheme Using Dual Color Image Through (7, 4) Hamming Code [Seite 138]
18.1 - 1 Introduction [Seite 138]
18.2 - 2 Proposed Method [Seite 140]
18.2.1 - 2.1 Numerical Illustration [Seite 141]
18.3 - 3 Experimental Result and Comparison [Seite 146]
18.4 - 4 Security Analysis [Seite 148]
18.5 - 5 Conclusion [Seite 149]
18.6 - References [Seite 149]
19 - A Study on the Effect of a Rectangular Slot on Miniaturization of Microstrip Patch Antenna [Seite 151]
19.1 - 1 Introduction [Seite 151]
19.2 - 2 Antenna Design [Seite 152]
19.3 - 3 Equivalent Circuits [Seite 153]
19.4 - 4 Results and Discussion [Seite 155]
19.5 - 5 Conclusion [Seite 158]
19.6 - References [Seite 159]
20 - FPGA Implementation of OLS (32, 16) Code and OLS (36, 20) Code [Seite 161]
20.1 - 1 Introduction [Seite 162]
20.2 - 2 Orthogonal Latin Square Codes [Seite 163]
20.2.1 - 2.1 Construction of the Parity Check Matrix [Seite 164]
20.3 - 3 Design of OLS Codec [Seite 167]
20.4 - 4 VLSI Implementation [Seite 169]
20.5 - 5 Conclusion [Seite 170]
20.6 - References [Seite 170]
21 - Comparative Study of Wavelets for Image Compression with Embedded Zerotree Algorithm [Seite 172]
21.1 - 1 Introduction [Seite 172]
21.2 - 2 Discrete Wavelet Transform in Image Compression [Seite 173]
21.3 - 3 Wavelets and Their Properties [Seite 174]
21.4 - 4 Image Compression Using EZW Algorithm [Seite 174]
21.5 - 5 Experiment and Results [Seite 175]
21.6 - 6 Conclusion [Seite 179]
21.7 - 7 Future Work [Seite 180]
21.8 - References [Seite 180]
22 - Design of Compact Wideband Folded Substrate-Integrated Waveguide Band-Pass Filter for X-band Applications [Seite 181]
22.1 - 1 Introduction [Seite 181]
22.2 - 2 Design of Substrate-Integrated Waveguide (SIW) [Seite 182]
22.2.1 - 2.1 SIW Design Formulas [Seite 183]
22.3 - 3 Design of Folded Substrate-Integrated Waveguide (FSIW) [Seite 183]
22.3.1 - 3.1 Design and Analysis of FSIW (with C Slot on Central Metal Septum of FSIW) [Seite 185]
22.3.2 - 3.2 Design and Analysis of FSIW (with E Slot on Central Metal Septum of FSIW) [Seite 186]
22.4 - 4 Results and Conclusion [Seite 187]
22.5 - References [Seite 188]
23 - DCT-Based Gray Image Watermarking Scheme [Seite 189]
23.1 - 1 Introduction [Seite 189]
23.2 - 2 Proposed Scheme [Seite 190]
23.2.1 - 2.1 Pseudorandom Non-repeated Position Generator [Seite 191]
23.2.2 - 2.2 Discrete Cosine Transform (DCT) [Seite 192]
23.2.3 - 2.3 Embedding Watermark [Seite 192]
23.2.4 - 2.4 Extraction of Watermark [Seite 193]
23.3 - 3 Experimental Results [Seite 193]
23.4 - 4 Performance Evaluation [Seite 193]
23.4.1 - 4.1 Imperceptibility [Seite 194]
23.4.2 - 4.2 Robustness [Seite 194]
23.4.3 - 4.3 Error Probability [Seite 195]
23.4.4 - 4.4 Comparative Study [Seite 195]
23.4.5 - 4.5 Attack and Analysis [Seite 195]
23.5 - 5 Conclusions [Seite 197]
23.6 - References [Seite 197]
24 - Five-Input Majority Gate Design with Single Electron Nano-Device [Seite 198]
24.1 - 1 Introduction [Seite 198]
24.1.1 - 1.1 Single Electron Device [Seite 199]
24.2 - 2 Five-Input Majority Gate Implementation [Seite 199]
24.3 - 3 Simulation Results of Five-Input Majority Gate [Seite 201]
24.4 - 4 Conclusion [Seite 202]
24.5 - References [Seite 203]
25 - Post-layout Power Supply Noise Suppression and Performance Analysis of Multi-core Processor Using 90 nm Process Technology [Seite 205]
25.1 - 1 Introduction [Seite 205]
25.2 - 2 Power Distribution Network and Supply Noise [Seite 206]
25.2.1 - 2.1 Ldi(t)/dt Noise [Seite 206]
25.2.2 - 2.2 IR Noise [Seite 206]
25.3 - 3 Budget for Decoupling Capacitance [Seite 207]
25.4 - 4 CAD Methodology [Seite 208]
25.5 - 5 Simulation Results and Analysis [Seite 209]
25.6 - 6 Conclusion and Future Scope [Seite 210]
25.7 - References [Seite 210]
26 - Enhanced Performance of GaN/InGaN Multiple Quantum Well LEDs by Shallow First Well and Stepped Electron-Blocking Layer [Seite 212]
26.1 - 1 Introduction [Seite 213]
26.2 - 2 Device Structure [Seite 213]
26.3 - 3 Simulation Framework [Seite 214]
26.4 - 4 Results and Discussion [Seite 215]
26.5 - 5 Conclusion [Seite 219]
26.6 - References [Seite 219]
27 - A µ-Controller-Based Biomedical Device to Measure EMG Strength from Human Muscle [Seite 221]
27.1 - 1 Introduction [Seite 221]
27.2 - 2 System Description [Seite 222]
27.2.1 - 2.1 EMG Sensors [Seite 222]
27.2.2 - 2.2 Signal Processing Circuitry [Seite 222]
27.2.3 - 2.3 Embedded Circuit Board [Seite 224]
27.3 - 3 System Operation [Seite 226]
27.4 - 4 Calculation [Seite 228]
27.5 - 5 Flow Chart Diagram [Seite 229]
27.6 - 6 Result and Discussion [Seite 230]
27.7 - References [Seite 230]
28 - Design and Implementation of a DCM Flyback Converter with Self-biased and Over-Current Protection Circuit [Seite 232]
28.1 - 1 Introduction [Seite 232]
28.2 - 2 Operation of Flyback Converter [Seite 235]
28.2.1 - 2.1 Operation During on Period of Switch [Seite 235]
28.2.2 - 2.2 Operation During off Period of Switch [Seite 237]
28.3 - 3 Design of Flyback Converter [Seite 237]
28.3.1 - 3.1 Input [Seite 238]
28.3.2 - 3.2 Buck Converter [Seite 238]
28.3.3 - 3.3 Snubber Circuit [Seite 239]
28.3.4 - 3.4 Feedback Isolation [Seite 239]
28.3.5 - 3.5 Control Section [Seite 239]
28.3.6 - 3.6 Output Section [Seite 239]
28.4 - 4 Result and Discussion [Seite 240]
28.5 - 5 Conclusion [Seite 242]
28.6 - References [Seite 242]
29 - Performance Improvement of Light-Emitting Diodes with W-Shaped InGaN/GaN Multiple Quantum Wells [Seite 243]
29.1 - 1 Introduction [Seite 243]
29.2 - 2 Device Structure and Simulation Framework [Seite 244]
29.3 - 3 Results and Discussion [Seite 246]
29.4 - 4 Conclusion [Seite 251]
29.5 - References [Seite 252]
30 - Behavioral Modeling of Differential Inductive Seismic Sensor and Implementation of Its Readout Circuit [Seite 254]
30.1 - 1 Introduction [Seite 254]
30.2 - 2 Behavioral Modeling of Differential Inductive Seismic Sensor [Seite 255]
30.2.1 - 2.1 Structure and Working Principle [Seite 255]
30.2.2 - 2.2 Mathematical Foundation [Seite 256]
30.3 - 3 Readout Circuit Design and Implementation [Seite 259]
30.4 - 4 Results and Discussion [Seite 260]
30.5 - 5 Conclusion [Seite 262]
30.6 - References [Seite 262]
31 - Application of PSO Variants for Optimal Design of Two-Stage CMOS Op-amp with Robust Bias Circuit [Seite 264]
31.1 - 1 Introduction [Seite 264]
31.2 - 2 Specifications for Design and Formulation of Cost Function [Seite 265]
31.3 - 3 Evolutionary Algorithms Used [Seite 266]
31.4 - 4 Discussions of Simulation Results [Seite 267]
31.5 - 5 Conclusions [Seite 273]
31.6 - References [Seite 273]
32 - Representation and Exploring the Semantic Organization of Bangla Word in the Mental Lexicon: Evidence from Cross-Modal Priming Experiments and Vector Space Model [Seite 274]
32.1 - 1 Introduction [Seite 274]
32.2 - 2 Related Work [Seite 275]
32.3 - 3 The Priming Experiment 1 [Seite 276]
32.3.1 - 3.1 Materials [Seite 277]
32.3.2 - 3.2 Procedure [Seite 277]
32.3.3 - 3.3 Participants [Seite 278]
32.3.4 - 3.4 Results and Discussion [Seite 278]
32.4 - 4 The Priming Experiment 2 [Seite 279]
32.4.1 - 4.1 Material and Procedure [Seite 279]
32.4.2 - 4.2 Participants [Seite 279]
32.4.3 - 4.3 Results and Discussion [Seite 279]
32.5 - 5 Analyzing the Effect of Semantic Priming Using Computational Model (VSM) [Seite 280]
32.6 - 6 Conclusions [Seite 281]
32.7 - References [Seite 281]
33 - Solving a Solid Transportation Problems Through Fuzzy Ranking [Seite 283]
33.1 - 1 Introduction [Seite 283]
33.2 - 2 Mathematical Model of FSTP [Seite 284]
33.3 - 3 Solution Method [Seite 285]
33.3.1 - 3.1 Algorithm for Proposed Method-1 [Seite 285]
33.3.2 - 3.2 Use of Fuzzy Expectation and GRG: [Seite 288]
33.4 - 4 Numerical Experiments: [Seite 288]
33.4.1 - 4.1 Optimum Results by Method-1: [Seite 288]
33.4.2 - 4.2 Optimum Results by Method-2: [Seite 291]
33.5 - 5 Conclusion [Seite 291]
33.6 - References [Seite 291]
34 - Optimal Design of Low-Noise Three-Stage Op-amp Using PSO Algorithm [Seite 293]
34.1 - 1 Introduction [Seite 293]
34.2 - 2 Optimization Algorithm Employed [Seite 294]
34.3 - 3 Design Specifications for the CMOS TSCOA [Seite 295]
34.4 - 4 Discussions on Simulation Results [Seite 296]
34.5 - 5 Conclusion [Seite 301]
34.6 - References [Seite 301]
35 - Optimal Design of Low-Voltage, Two-Stage CMOS Op-amp Using Evolutionary Techniques [Seite 302]
35.1 - 1 Introduction [Seite 302]
35.2 - 2 Design Specifications and Objective Function Formulation [Seite 303]
35.3 - 3 Evolutionary Algorithm Employed [Seite 306]
35.4 - 4 Simulation Results and Discussions [Seite 307]
35.5 - 5 Conclusions [Seite 309]
35.6 - References [Seite 314]
