
Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing
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List of Contributors xiii
Foreword xvii
Preface xix
1 Introduction to Spintronic and Nanomagnetic Computing Devices 1 Jayasimha Atulasimha and Supriyo Bandyopadhyay
1.1 Spintronic Devices 1
1.2 Nanomagnetic Devices 3
1.2.1 Use of Spin Torque to Switch Nanomagnets 6
1.2.2 Other Methodologies for Switching Nanomagnets 6
1.3 Thinking beyond Traditional Boolean Logic 7
References 7
2 Potential Applications of all Electric Spin Valves Made of Asymmetrically Biased Quantum Point Contacts 9 Nikhil Bhandari, Maitreya Dutta, James Charles, Junjun Wan, Marc Cahay, and S.T Herbert
2.1 Introduction 9
2.2 Quantum Point Contacts 11
2.3 Spin Orbit Coupling 14
2.3.1 Rashba SOC (RSOC) 15
2.3.2 Dresselhaus SOC (DSOC) 15
2.3.3 Lateral Spin-Orbit Coupling (LSOC) 16
2.4 Importance of Spin Relaxation in 1D Channels 18
2.5 Observation of a 0.5 Conductance Plateau in Asymmetrically Biased QPCs in the Presence of LSOC 20
2.5.1 Early Experimental Results Using InAs QPCs 20
2.5.2 NEGF Conductance Calculations 20
2.5.3 Spin Texture Associated with Conductance Anomalies in QPCs 23
2.5.4 Prospect for Generation of Spin Polarized Current at Higher Temperature 25
2.5.5 Observation of Other Anomalous Conductance Plateaus in an Asymmetrically Biased InAs/In0.52 Al0.48 as QPCs 26
2.6 Intrinsic Bistability near Conductance Anomalies 27
2.6.1 Experimental Results 28
2.6.2 NEGF Simulations 30
2.7 QPC Structures with Four In-plane SGs: Toward an All Electrical Spin Valve 43
2.7.1 Preliminary Results on Four-gate QPCs 43
2.7.2 Experiments 46
2.7.3 Onset of Hysteresis and Negative Resistance Region 50
2.8 Future Work 56
2.9 Summary 58
Acknowledgments 60
References 60
3 Spin-Transistor Technology for Spintronics/CMOS Hybrid Logic Circuits and Systems 65 Satoshi Sugahara, Yusuke Shuto, and Shuu'ichirou Yamamoto
3.1 Spin-Transistor and Pseudo-Spin-Transistor 65
3.1.1 Spin - MOSFET 66
3.1.2 Pseudo-Spin-MOSFET 69
3.2 Energy-Efficient Logic Applications of Spin-Transistors 72
3.2.1 Power Gating with Nonvolatile Retention 73
3.2.2 Nonvolatile Bistable Circuits 75
3.2.3 Break-even Time 76
3.3 Nonvolatile SRAM Technology 78
3.3.1 Static Noise Margin of Nonvolatile SRAM 79
3.3.2 Energy Performance of NV-SRAM 81
3.4 Application of Nonvolatile Bistable Circuits for Memory Systems 86
References 88
4 Spin Transfer Torque: A Multiscale Picture 91 Yunkun Xie, Ivan Rungger, Kamaram Munira, Maria Stamenova, Stefano Sanvito, and Avik W. Ghosh
4.1 Introduction 91
4.1.1 Background 91
4.1.2 STT Modeling: An Integrated Approach 93
4.2 The Physics of Spin Transfer Torque 94
4.2.1 Free-Electron Model for Magnetic Tunnel Junction 96
4.3 First Principles Evaluation of TMR and STT 102
4.3.1 The TMR Effect in the MgO Barrier 104
4.3.2 Currents and Torques in NEGF 114
4.3.3 First Principles Results on Spin Transfer Torque 116
4.4 Magnetization Dynamics 119
4.4.1 Landau-Lifshitz-Gilbert Equation 119
4.4.2 Spin Torque Switching in Presence of Thermal Fluctuations 121
4.4.3 Including Thermal Fluctuations: Stochastic LLG vs Fokker Planck 122
4.5 Summary: Multiscaling from Atomic Structure to Error Rate 125
Acknowledgments 129
References 129
5 Magnetic Tunnel Junction Based Integrated Logics and Computational Circuits 133 Jian-Ping Wang, Mahdi Jamali, Angeline Klemm Smith, and Zhengyang Zhao
5.1 Introduction 133
5.2 GMR Based Field Programmable Devices 134
5.3 MTJ Based Field Programmable Devices 136
5.3.1 MTJ Structure and TMR Ratio 136
5.3.2 MTJ Based Magneto-Logic 137
5.3.3 Utilization of STT in MTJ Based Magneto-Logic 144
5.4 Information Transformation between Gates 145
5.4.1 Direct Communication Using Charge Current 146
5.4.2 Magnetic Domain Walls for Information Transferring 148
5.5 MTJ Based Logic-in-Memory Devices 148
5.6 Magnetic Quantum Cellular Automata 149
5.6.1 Introduction and Background 149
5.6.2 Experimental Demonstrations 150
5.7 All-Spin Based Magnetic Logic 155
5.7.1 Nonlocal Lateral Spin Valve Background 155
5.7.2 Critical Parameters for Operation 155
5.7.3 Selected Review of Experimental Demonstrations 156
5.7.4 Applications to All-Spin Logic Devices 158
5.8 Summary 161
Acknowledgment 161
References 162
6 Magnetization Switching and Domain Wall Motion Due to Spin Orbit Torque 165 Debanjan Bhowmik, OukJae Lee, Long You, and Sayeef Salahuddin
6.1 Introduction 165
6.2 Theory 166
6.2.1 Rashba Effect 168
6.2.2 Spin Hall Effect 169
6.3 Magnetic Switching Driven by Spin Orbit Torque 171
6.4 Domain Wall Motion Driven by Spin Orbit Torque 176
6.5 Applications of Spin Orbit Torque 184
6.6 Conclusion 186
References 186
7 Magnonic Logic Devices 189 Alexander Khitun and Alexander Kozhanov
7.1 Introduction 189
7.2 Magnonic Logic Devices 197
7.3 Spin Wave-Based Logic Gates and Architectures 206
7.4 Discussion and Summary 212
References 216
8 Strain Mediated Magnetoelectric Memory 221 N. Tiercelin, Y. Dusch, S. Giordano, A. Klimov, V. Preobrazhensky, and P. Pernod
8.1 Introduction 221
8.2 Concept of Unequivocal Strain- or Stress-Switched Nanomagnetic Memory 223
8.2.1 Magnetic Configuration and Equilibrium Positions 223
8.2.2 Quasi-Static Stress-Mediated Switching 225
8.3 LLG Simulations - Macrospin Model 226
8.3.1 Landau-Lifshitz-Gilbert Equation and Effective Magnetic Field 226
8.3.2 Memory Parameters 227
8.3.3 Results of the Macrospin Model 228
8.4 LLG Simulations - Eshelby Approach 231
8.4.1 Geometry of the Memory Element 232
8.4.2 Coupling with the External Magnetic Field 233
8.4.3 Coupling with the External Electric Field and Elastic Stress 234
8.4.4 Static Behavior of the System 234
8.4.5 Dynamic Behavior of the System 235
8.5 Stochastic Error Analysis 238
8.5.1 Statistical Mechanics of Magnetization in a Single-Domain Particle 238
8.5.2 Switching Process within the Magnetoelectric Memory 243
8.6 Preliminary Experimental Results 248
8.6.1 Piezoelectric Actuator with in-Plane Polarization 248
8.6.2 Ferroelectric Relaxors with out-of-Plane Polarization 249
8.6.3 Magnetoelastic Switching in a Magneto-Resistive Structure 250
8.7 Conclusions 250
Acknowledgments 252
References 253
9 Hybrid Spintronics-Strainronics 259 Ayan K. Biswas, Noel D'Souza, Supriyo Bandyopadhyay, and Jayasimha Atulasimha
9.1 Introduction 259
9.1.1 Nanomagnetic Memory and Logic Devices: The Problem of Energy Dissipation in the Clocking Circuit 260
9.1.2 Switching Nanomagnets with Strain Could Drastically Reduce Energy Dissipation: Hybrid Spintronics-Straintronics Overview 261
9.1.3 Landau Lifshitz Gilbert (LLG) Equation 263
9.2 Nanomagnetic Memory Switched with Strain 265
9.2.1 Complete Magnetization Reversal (180¿ Switching): Complex out-of-Plane Dynamics 265
>90¿ 268
9.2.3 Complete 180¿ Switching with Stress Alone 269
9.2.4 Mixed Mode Switching of Magnetization by 180¿: Acoustically Assisted Spin Transfer Torque (STT) Switching for Nonvolatile Memory 273
9.3 Straintronic Clocking of Nanomagnetic Logic 276
9.3.1 Two-State Dipole Coupled Nanomagnetic Logic 276
9.3.2 Four-state Multiferroic Nanomagnetic Logic (NML) 279
9.3.3 Switching Error in Dipole Coupled Nanomagnetic Logic (NML) 283
9.3.4 Straintronic Nanomagnetic Logic Devices (NML) 284
9.4 Summary and Conclusions 286
References 286
10 Unconventional Nanocomputing with Physical Wave Interference Functions 291 Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, and Csaba Andras Moritz
10.1 Overview 291
10.2 Spin Waves Physical Layer for WIF Implementation 293
10.2.1 Physical Fabric Components 295
10.3 Elementary WIF Operators for Logic 298
10.4 Binary WIF Logic Design 303
10.4.1 Binary WIF Full Adder 303
10.4.2 Parallel Counters 306
10.4.3 Benchmarking Binary WIF Circuits vs. CMOS 309
10.4.4 WIF Topology Exploration 310
10.5 Multivalued WIF Logic Design 311
10.5.1 Multivalued Operators and Implementation Using WIF 312
10.5.2 Multivalued Arithmetic Circuit Example: Quaternary Full Adder 316
10.5.3 Benchmarking of WIF Multivalued Circuits vs. Conventional CMOS 318
10.5.4 Input/Output Logic for Data Conversion between Binary and Radix-r Domains 319
10.6 Microprocessors with WIF: Opportunities and Challenges 320
10.7 Summary and Future Work 326
References 326
Index 329
A color plate section falls between pages 44 and 45
CHAPTER 1
Introduction to Spintronic and Nanomagnetic Computing Devices
Jayasimha Atulasimha1 and Supriyo Bandyopadhyay2
1Department of Mechanical and Nuclear Engineering, Virginia Commonwealth University, Richmond, VA, US
2Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, VA, USA
This book focuses on recent developments in two important and interrelated information processing device concepts and related phenomena: "spintronic devices" and "nanomagnetic devices." In the former, individual electron spins are coherently manipulated as they flow through the active region of a device to elicit device functionality. In the latter, an ensemble of spins in a nanostructure acts collectively as a giant classical spin (a single domain nanomagnet) owing to mutual exchange coupling, and the giant spin polarization (or the magnetization of the nanomagnet) is switched between stable orientations to store and/or process binary data. These information processing paradigms have attracted attention because of their low energy dissipation, nonvolatility and relatively fast speed of operation.
1.1 Spintronic Devices
An iconic device in the field of spintronics is the Datta-Das [1] Spin Field Effect Transistor (SPINFET) in which the current flowing between two of the terminals (source and drain) is modulated with a gate potential that does not change the carrier concentration in the channel of the transistor, but instead changes the spin polarization of the carriers. The source and drain contacts are ferromagnets that act as spin polarizers and analyzers. The source injects spin polarized electrons, the gate voltage precesses the spins in the channel owing to Rashba spin-orbit interaction [2] and the drain selectively transmits electrons depending on the degree of precession they have undergone in the channel. Thus, by varying the gate voltage, one can vary the source-to-drain current and realize transistor action. The operation of the transistor is briefly explained in Figure 1.1.
Figure 1.1 Operation of a Datta-Das SPINFET. The source injects spin polarized electrons, polarized in the direction of source-to-drain current (x-direction). When the gate voltage is zero, the spins do not precess and are fully transmitted by the drain resulting in maximum (on) current. When the gate voltage is turned on, it produces an electric field Ey in the y-direction due to Rashba spin-orbit interaction that results in an effective magnetic field of flux density Bz in the z-direction. This field causes the electrons to precess about itself. The left panel shows a one-dimensional SPINFET and the right panel a two-dimensional SPINFET.
There are several impediments to practical room temperature implementation of the Datta-Das SPINFET. Foremost among them is the inefficiency of the spin polarizer and analyzer. The inability of ferromagnet/semiconductor interfaces to inject and detect spins with high efficiency results in low on-off ratios of the drain current [3]. The on-off ratio is also reduced significantly if the channel of the SPINFET is not strictly one-dimensional [4], that is, if it is not a quantum wire with only the lowest carrier subband occupied. Finally, coherent transportation and manipulation of spins over the length of the channel at room temperature is challenging. The channel has to be sufficiently long to allow at least one-half period of spin precession and retaining spin coherence over that length is difficult at room temperature. Recently, coherent spin transport was demonstrated in a strictly one-dimensional InSb nanowire at room temperature [5], raising hopes for the Datta-Das transistor. That, together with the vast improvement in spin injection and detection efficiencies made possible by the use of quantum point contacts [6] as source and drain, has made a significant advance toward the demonstration of the Datta-Das device. Very significant steps in that direction have been reported recently involving spin injection, detection and manipulation with quantum point contacts as well as spin manipulation using spin orbit coupling to realize all-electric and all-semiconductor spin field effect transistors [7].
Chapter 2 discusses the use of quantum point contacts (QPC) with lateral spin-orbit coupling (LSOC) to create a strongly spin-polarized current by tuning the asymmetric bias voltages on the side gates in the absence of any applied magnetic field. By injecting this strongly spin-polarized current into the channel of a SPINFET, high injection efficiency can be obtained. This chapter also explores the different regimes of operation of all-electric spin valves made of quantum point contact and quantum dots, with spin-orbit coupling, and the ramification of an all-electric spin valve for future spin-based devices, circuits, and architectures.
Chapter 3 explores and surveys interesting variations of the Datta-Das spin transistor by proposing devices that do not rely on the gate voltage controlled precession of spins in the channel. Instead it surveys two other devices:
- "Spin MOSFET," comprising a regular MOSFET with ferromagnetic contacts whose magnetizations can be switched from parallel or antiparallel configuration, thereby turning the transistor on and off.
- "Pseudo-spin-MOSFET," which is essentially a MOSFET with a magneto-tunneling junction, or MTJ connected to either the source or the drain.
This chapter further discusses the use of these two devices for energy-efficient (low power) nonvolatile logic circuits. Since the gating action and the parallel/antiparallel orientation of the magnetizations of two ferromagnetic contacts (in case of Spin-MOSFET) or the MTJ's magnetic layers (in case of Pseudo spin-MOSFET) can be independently controlled, these devices are well suited for nonvolatile bistable circuits. Finally, implementation of nonvolatile memory elements based on these devices is also discussed. In some sense, these devices are closer to "nanomagnetic devices" as the magnetic states of the MTJ/ferromagnetic contacts (nanomagnets) encode information.
1.2 Nanomagnetic Devices
Inherent advantages: Nanomagnets have two inherent advantages over transistors as binary switches: nonvolatility (or the ability to store information without any standby power dissipation) and the potential to switch from one stable state to another with extremely small energy dissipation. These are explained below:
-
Consider an elliptical Terfenol-D nanomagnet as shown in Figure 1.2 (rightmost figures) with major axis, minor axis and thickness respectively 110 nm, 90 nm and 6 nm. These dimensions ensure that the nanomagnet has a single domain [11] and that the shape anisotropy energy barrier (Eb), which separates the two degenerate minima in the potential energy profile of the nanomagnet (these minima correspond to the two stable magnetization orientations that are mutually antiparallel and aligned along the long axis), is 2.2 eV (85.12 kT at room temperature). That makes the probability of spontaneous magnetization flipping between the two stable orientations due to thermal agitations equal to e-Eb/kT = e-85 per attempt [8]. Therefore, if binary bit information has been written into the magnetization orientation of the nanomagnet, then that information is retained for a time of (1/f0) e85 = 2.6 × 1017 years, if we assume the attempt frequency f0 to be 1 THz [9]. In other words, the nanomagnet is nonvolatile. If we "write" binary information in the nanomagnet by orienting the magnetization along one of the two stable states, that information stays uncorrupted almost in perpetuity, even when no energy is supplied to the nanomagnet to retain the information.
Figure 1.2 Transistor, single-spin and single-domain nanomagnet encoding logical "0" and "1" states.
- The nanomagnet can not only retain information but also process it in a very energy-efficient way. The minimum energy dissipated in switching a charge-based device like a transistor at a temperature T is NkTln(1/p) independent of the switching speed [10] where N is the number of information carriers (electrons) in the transistor, k is the Boltzmann constant, and p is the bit error probability. This happens because the charges act independently of each other and there is no collective dynamics when switching takes place, resulting in N degrees of freedom for the charge ensemble. In c6ontrast, the minimum energy dissipated to switch a single-domain nanomagnet's magnetization is only ~ kTln(1/p), since the exchange interaction between the many spins comprising a single domain nanomagnet makes all of them behave collectively like a giant single spin and rotate in unison [10, 11], resulting in a single degree of freedom. The collective dynamics of spins - absent among charges - make the nanomagnet a far more energy-efficient switch than a transistor. If we assume the same number of information carriers in a transistor and in a single domain nanomagnet in Figure 1.2, then for the same bit error probability, the ratio...
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