
VLSI Design Environments
George Zobrist(Editor)
Taylor & Francis (Publisher)
1st Edition
Published on 17. April 2000
Book
Hardback
328 pages
978-90-5699-667-3 (ISBN)
Description
VLSI Design Environments investigates design alternatives such as object oriented data modelling. The difficulty of automating chip architecture designs is caused by the complexity of the problem. The explosion of design decions make a heuristic approach necessary. PLAYOUT aims at the solution of system problems based on hierarchy, top-down planning, silicon complier presentations, advances in encoding logic synthesis and a microarchitecre and logic optimization system. PLAYOUT supports the physical design from entering the structure of digital systems to the generation of the mask. The concept for autonomous tools with a clear interface to the network description and the simple interface to the graphics is presented. This enables the designer to have a great influence on the configuration of the placement of the schematic diagram. Substantial progress is being made in behavioural and logic synthesis, both of which depend upon specifications.
More details
Language
English
Place of publication
London
United Kingdom
Target group
Professional and scholarly
Dimensions
Height: 229 mm
Width: 152 mm
Weight
710 gr
ISBN-13
978-90-5699-667-3 (9789056996673)
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Schweitzer Classification
Other editions
Additional editions


George Zobrist
VLSI Design Environments
E-Book
04/2000
1st Edition
CRC Press
€251.99
Available for download
Person
George Zobrist
Content
Taking a heuristic approach, VLSI Design Environments investigates design alternatives such as object oriented data modelling. PLAYOUT aims at the solution of system problems based on hierarchy, top-down planning, silicon complier presentations, advances in encoding logic synthesis, and a microarchitecre and logic optimization system. PLAYOUT supports the physical design from entering the structure of digital systems to the generation of the mask. The concept for autonomous tools with a clear interface to the network description and the simple interface to the graphics is presented. This enables the designer to have a great influence on the configuration of the placement of the schematic diagram.