
Design Recipes for FPGAs: Using Verilog and VHDL
Peter Wilson(Author)
Newnes (Publisher)
Published on 11. May 2007
Book
Paperback/Softback
320 pages
978-0-7506-6845-3 (ISBN)
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Description
Design Recipes for FPGAs: Using Verilog and VHDL provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, the book gives 'easy-to-find' design techniques and templates at all levels, together with functional code. Written in an informal and 'easy-to-grasp' style, it goes beyond the principles of FPGA s and hardware description languages to actually demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA.
This book's 'easy-to-find' structure begins with a design application to demonstrate the key building blocks of FPGA design and how to connect them, enabling the experienced FPGA designer to quickly select the right design for their application, while providing the less experienced a 'road map' to solving their specific design problem. The book also provides advanced techniques to create 'real world' designs that fit the device required and which are fast and reliable to implement.
This text will appeal to FPGA designers of all levels of experience. It is also an ideal resource for embedded system development engineers, hardware and software engineers, and undergraduates and postgraduates studying an embedded system which focuses on FPGA design.
This book's 'easy-to-find' structure begins with a design application to demonstrate the key building blocks of FPGA design and how to connect them, enabling the experienced FPGA designer to quickly select the right design for their application, while providing the less experienced a 'road map' to solving their specific design problem. The book also provides advanced techniques to create 'real world' designs that fit the device required and which are fast and reliable to implement.
This text will appeal to FPGA designers of all levels of experience. It is also an ideal resource for embedded system development engineers, hardware and software engineers, and undergraduates and postgraduates studying an embedded system which focuses on FPGA design.
Reviews / Votes
"Design Recipes for FPGAs is an excellent volume for engineers who work with FPGAs either regularly or occasionally... the book provides a handy shelf reference with examples for many useful functional blocks, ranging from relatively small illustrative syntactic and structural examples to more complex concepts. Whether you work in VHDL occasionally or every day, you'll find practical help in this book." --Lewin Edwards, Design Engineer and Technical AuthorMore details
Language
English
Place of publication
Oxford
United Kingdom
Publishing group
Elsevier Science & Technology
Target group
Professional and scholarly
Embedded system development engineers, FPGA engineers, hardware and software engineers. Undergraduates and postgraduates studying an embedded system which focuses on FPGA design.
Illustrations
Approx. 100 illustrations
Dimensions
Height: 246 mm
Width: 189 mm
Weight
630 gr
ISBN-13
978-0-7506-6845-3 (9780750668453)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
New editions

Book
09/2015
2nd Edition
Newnes
€58.00
Shipment within 15-20 days
Additional editions

Peter Wilson
Design Recipes for FPGAs: Using Verilog and VHDL
E-Book
02/2011
Newnes
€49.95
Available for download
Person
Peter Wilson is Professor of Electronic Systems Engineering in the Electronic and Electrical Engineering Department at the University of Bath. After obtaining degrees at Heriot-Watt University in Edinburgh he worked as a Senior Design Engineer with Ferranti, Scotland and then as a Technical Specialist for Analogy, Inc. in Oregon, USA. After obtaining his PhD at the University of Southampton, he joined the faculty and was a member of the Academic staff at the University of Southampton from 2002 till 2015 when he moved to the University of Bath. He has published more than 100 papers and 3 books. Peter Wilson is also a Fellow of the IET, Fellow of the British Computer Society, a Chartered Engineer in the UK and a Senior Member of the IEEE.
Content
Introduction; FPGA Applications in VHDL; A Designer's Toolbox in VHDL; Optimizing Designs; Fundamental Techniques; Index